Oskar Baumgartner

Orcid: 0000-0001-7029-1884

According to our database1, Oskar Baumgartner authored at least 8 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024

2023
A Study of the Variability and Design Considerations of Ferroelectric VNAND Memories With Polycrystalline Films Using An Experimentally Validated TCAD Model.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022
Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire Junction-Less Transistors.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Co-integration Process Compatible Input/Output (I/O) Device Options for GAA Nanosheet Technology.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

2021
Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics.
Proceedings of the IEEE International Memory Workshop, 2021

1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and Pillar.
Proceedings of the IEEE International Memory Workshop, 2021

2018
Cell Designer - a Comprehensive TCAD-Based Framework for DTCO of Standard Logic Cells.
Proceedings of the 48th European Solid-State Device Research Conference, 2018


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