Óscar Pereira-Rial

Orcid: 0000-0001-9021-9273

According to our database1, Óscar Pereira-Rial authored at least 15 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

Live Demonstration: 5-bit signed SRAM-based DNN CIM for Image Recognition.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Live Demonstration: A Mixed-Mode Signal CMOS Chip for Hyperdimensional Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023

Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems.
Proceedings of the 19th International Conference on Synthesis, 2023

2022
An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

0.6-V-V<sub>IN</sub> 7.0-nA-I<sub>Q</sub> 0.75-mA-I<sub>L</sub> CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2020
On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Ultralow power voltage reference circuit for implantable devices in standard CMOS technology.
Int. J. Circuit Theory Appl., 2019

Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm<sup>2</sup> Subthreshold Voltage Reference for Implantable Devices.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019


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