Oreste Villa
According to our database1,
Oreste Villa
authored at least 67 papers
between 2005 and 2023.
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Bibliography
2023
FinePack: Transparently Improving the Efficiency of Fine-Grained Transfers in Multi-GPU Systems.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization, 2023
2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021
2020
HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
2019
J. Parallel Distributed Comput., 2019
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
2017
Exploring Efficient Hardware Support for Applications with Irregular Memory Patterns on Multinode Manycore Architectures.
IEEE Trans. Parallel Distributed Syst., 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
2016
Parallel Comput., 2016
2015
Special Issue on Architectures and Algorithms for Irregular Applications (AAIA) - Guest editors' introduction.
J. Parallel Distributed Comput., 2015
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015
Proceedings of the Big Data - Algorithms, Analytics, and Applications., 2015
2014
Parallel Comput., 2014
Proceedings of the International Conference for High Performance Computing, 2014
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014
Proceedings of the Numerical Computations with GPUs, 2014
2013
Clust. Comput., 2013
Proceedings of the International Conference on Social Computing, SocialCom 2013, 2013
Toward a data scalable solution for facilitating discovery of scientific data resources.
Proceedings of the 2013 International Workshop on Data-Intensive Scalable Computing Systems, 2013
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013
YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs.
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013
Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2013
Exploring manycore multinode systems for irregular applications with FPGA prototyping.
Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013
Proceedings of the Euro-Par 2013 Parallel Processing, 2013
Proceedings of the 2013 IEEE International Conference on Cluster Computing, 2013
Proceedings of the 2013 IEEE International Conference on Big Data (IEEE BigData 2013), 2013
Exploring hardware support for scaling irregular applications on multi-node multi-core architectures.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
IEEE Trans. Parallel Distributed Syst., 2012
Aho-Corasick String Matching on Shared and Distributed-Memory Parallel Architectures.
IEEE Trans. Parallel Distributed Syst., 2012
Int. J. High Perform. Comput. Appl., 2012
Designing Next-Generation Massively Multithreaded Architectures for Irregular Applications.
Computer, 2012
A High Performance Computing Network and System Simulator for the Power Grid: NGNS^2.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012
Proceedings of the 12th IEEE/ACM International Symposium on Cluster, 2012
2011
Proceedings of the first workshop on Irregular applications: architectures and algorithm, 2011
Proceedings of the first workshop on Irregular applications: architectures and algorithm, 2011
Proceedings of the 2011 IEEE International Conference on Cluster Computing (CLUSTER), 2011
Contention Modeling for Multithreaded Distributed Shared Memory Machines: The Cray XMT.
Proceedings of the 11th IEEE/ACM International Symposium on Cluster, 2011
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011
2010
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010
Proceedings of the 2010 IEEE International Conference on Cluster Computing, 2010
Proceedings of the 7th Conference on Computing Frontiers, 2010
2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Scalable transparent checkpoint-restart of global address space applications on virtual machines over infiniband.
Proceedings of the 6th Conference on Computing Frontiers, 2009
2008
IEEE Trans. Parallel Distributed Syst., 2008
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Proceedings of the 5th Conference on Computing Frontiers, 2008
Efficiency and scalability of barrier synchronization on NoC based many-core architectures.
Proceedings of the 2008 International Conference on Compilers, 2008
2007
Exploration of distributed shared memory architectures for NoC-based multiprocessors.
J. Syst. Archit., 2007
Challenges in Mapping Graph Exploration Algorithms on Advanced Multi-core Processors.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Proceedings of the 2007 IEEE International Conference on Cluster Computing, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
SIGARCH Comput. Archit. News, 2006
Power/performance hardware optimization for synchronization intensive applications in MPSoCs.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip.
Proceedings of the 2005 Design, 2005