Olivier Ginez

According to our database1, Olivier Ginez authored at least 10 papers between 2006 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Design challenges for prototypical and emerging memory concepts relying on resistance switching.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009
A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash.
J. Electron. Test., 2009

Design and Test Challenges in Resistive Switching RAM (ReRAM): An Electrical Model for Defect Injections.
Proceedings of the 14th IEEE European Test Symposium, 2009

An on-line testing scheme for repairing purposes in Flash memories.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008
A Novel Low Power Oriented Design Methodology for Analog Blocks.
J. Low Power Electron., 2008

A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories.
Proceedings of the 2008 IEEE International Test Conference, 2008

2007
Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window.
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

A concurrent approach for testing address decoder faults in eFlash memories.
Proceedings of the 2007 IEEE International Test Conference, 2007

Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories.
Proceedings of the 12th European Test Symposium, 2007

2006
An Overview of Failure Mechanisms in Embedded Flash Memories.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006


  Loading...