Olivier Billoint

According to our database, Olivier Billoint authored at least 33 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Charge-based Sense Demonstration in 1T-1C HZO FeRAM Arrays to Overcome CBL-induced Bank Size Limitations.

Olivier Billoint, Simon Martin, J. Laguerre, L. Hosier, Jean Coignus, Catherine Carabasse, François Andrieu, Laurent Grenouillet

Proceedings of the IEEE International Memory Workshop, 2024

2023

Memory Window in Si: HfO2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced Nodes.

J. Laguerre, Marc Bocquet, Olivier Billoint, Simon Martin, Jean Coignus, Catherine Carabasse, Thomas Magis, T. Dewolf, François Andrieu, Laurent Grenouillet

Proceedings of the IEEE International Memory Workshop, 2023

2021

Area and Cost Analysis of the Mixed Signal Circuits in a Novel Monolithic 3D Process.

Behnam Samadpoor Rikan, Philipp Häfliger, Gerald Cibrario, Olivier Billoint, Mehdi Mouhdach

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors.

Laurent Grenouillet, Niccolo Castellani, Alain Persico, Valentina Meli, Simon Martin, Olivier Billoint, R. Segaud, Stefania Bernasconi, C. Pellissier, Carine Jahan, Christelle Charpin-Nicolle, P. Dezest, Catherine Carabasse, Paul Besombes, Sebastien Ricavy, N. P. Tran, A. Magalhaes-Lucas, A. Roman, C. Boixaderas, Thomas Magis, Messaoud Bedjaoui, M. Tessaire, A. Seignard, F. Mazen, S. Landis, Elisa Vianello, Gabriel Molas, Fred Gaillard, Julien Arcamone, Etienne Nowak

Proceedings of the IEEE International Memory Workshop, 2021

2020

M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC.

Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Romain Lemaire, Pascal Vivet, Perrine Batude, Didier Lattard

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Synchronized Interconnected ADPLLs for Distributed Clock Generation in 65 nm CMOS Technology.

Dimitri Galayko, Chuan Shan, Eldar Zianbetov, Mohammad Javidan, Anton Korniienko, François Anceau, Olivier Billoint, Éric Colinet, Elena Blokhina, Jérôme Juillard

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Merging PDKs to Build a Design Environment for 3D Circuits: Methodology, Challenges and Limitations.

Olivier Billoint, Karim Azizi-Mourier, Gerald Cibrario, Didier Lattard, Mehdi Mouhdach, Sébastien Thuries, Pascal Vivet

Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2018

A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit.

François Andrieu, Perrine Batude, Laurent Brunet, Claire Fenouillet-Béranger, Didier Lattard, Sébastien Thuries, Olivier Billoint, Richard Fournel, Maud Vinet

Proceedings of the 2018 International Conference on IC Design & Technology, 2018

Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges.

Pascal Vivet, Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Didier Lattard, Edith Beigné, Perrine Batude

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Microelectron. J., 2017

Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells.

Melanie Brocard, Benoît Mathieu, Jean-Philippe Colonna, Cristiano Santos, Claire Fenouillet-Béranger, Cao-Minh Vincent Lu, Gerald Cibrario, Laurent Brunet, Perrine Batude, François Andrieu, Sébastien Thuries, Olivier Billoint

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

In-situ Fmax/Vmin tracking for energy efficiency and reliability optimization.

Ivan Miro Panades, Edith Beigné, Olivier Billoint, Yvain Thonnart

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

2016

Recent advances in 3D VLSI integration.

Claire Fenouillet-Béranger, Perrine Batude, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, M.-P. Samson, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Gerald Cibrario, Maud Vinet

Proceedings of the International Conference on IC Design and Technology, 2016

Opportunities brought by sequential 3D CoolCube™ integration.

Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Guillaume Berhault, Cristiano Lopes Dos Santos, Gerald Cibrario, Fabien Clermidy, Daniel Gitlin, Olivier Faynot

Proceedings of the 46th European Solid-State Device Research Conference, 2016

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI.

Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint

Proceedings of the 46th European Solid-State Device Research Conference, 2016

Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes.

Cristiano Santos, Pascal Vivet, Sébastien Thuries, Olivier Billoint, Jean-Philippe Colonna, Perceval Coudrain, Lee Wang

Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose.

Gerald Cibrario, Nour Ben Salem, Joris Lacord, Karim Azizi-Mourier, Olivier Rozeau, Etienne Maurin, Olivier Billoint, Sébastien Thuries, Alexandre Valentian

Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

2015

A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking.

Edith Beigné, Alexandre Valentian, Ivan Miro Panades, Robin Wilson, Philippe Flatresse, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Jean-Philippe Noel, Olivier Thomas, Yvain Thonnart

IEEE J. Solid State Circuits, 2015

Compact interconnect approach for networks of neural cliques using 3D technology.

Bartosz Boguslawski, Hossam Sarhan, Frédéric Heitzmann, Fabrice Seguin, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

A distributed synchronization of all-digital PLLs network for clock generation in synchronous SOCs.

Chuan Shan, Eldar Zianbetov, François Anceau, Olivier Billoint, Dimitri Galayko

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges.

Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, Ogun Turkyilmaz, Sébastien Thuries, Fabien Clermidy

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

UTBB FDSOI technology flexibility for ultra low power internet-of-things applications.

Edith Beigné, Jean-Frédéric Christmann, Alexandre Valentian, Olivier Billoint, Esteve Amat, Dominique Morche

Proceedings of the 45th European Solid State Device Research Conference, 2015

A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool.

Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, A. Fustier, Julien Michallet, Olivier Faynot, Ogun Turkyilmaz, Jean-Frédéric Christmann, Sébastien Thuries, Fabien Clermidy

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Intermediate BEOL process influence on power and performance for 3DVLSI.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Deprat, Alexandre Ayres De Sousa, Perrine Batude, Claire Fenouillet-Béranger, Fabien Clermidy

Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2014

3D technologies for reconfigurable architectures.

Fabien Clermidy, O. Turkyimaz, Olivier Billoint, Pierre-Emmanuel Gaillardon

Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking.

Robin Wilson, Edith Beigné, Philippe Flatresse, Alexandre Valentian, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Ivan Miro Panades, Jean-Philippe Noël, Bertrand Pelloux-Prayer, Philippe Roche, Olivier Thomas, Yvain Thonnart, David Turgis, Fabien Clermidy, Philippe Magarshack

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A high-level design rule library addressing CMOS and heterogeneous technologies.

Gerald Cibrario, Marjorie Gary, Fabien Gays, Karim Azizi-Mourier, Olivier Billoint, Ogun Turkyilmaz, Olivier Rozeau

Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

3DCoB: A new design approach for Monolithic 3D Integrated circuits.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

FPGA prototyping of large reconfigurable ADPLL network for distributed clock generation.

Chuan Shan, Eldar Zianbetov, Weiqiang Yu, François Anceau, Olivier Billoint, Dimitri Galayko

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

FDSOI versus BULK CMOS at 28 nm node which technology for ultra-low power design?

Jani Mäkipää, Olivier Billoint

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs.

Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson

Proceedings of the Design, Automation and Test in Europe, 2013

Distributed clock generator for synchronous SoC using ADPLL network.

Eldar Zianbetov, Dimitri Galayko, François Anceau, Mohammad Javidan, Chuan Shan, Olivier Billoint, Anton Korniienko, Éric Colinet, Gérard Scorletti, J. M. Akrea, Jérôme Juillard

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013