Oliver Mischke

According to our database1, Oliver Mischke authored at least 19 papers between 2010 and 2019.

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Bibliography

2019
Practical Evaluation of Masking for NTRUEncrypt on ARM Cortex-M4.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2019

2017
Cache attacks and countermeasures for NTRUEncrypt on MPSoCs: Post-quantum resistance for the IoT.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

2016
Physical attacks and countermeasures on the advanced encryption standard.
PhD thesis, 2016

2015
Achieving Side-Channel Protection with Dynamic Logic Reconfiguration on Modern FPGAs.
IACR Cryptol. ePrint Arch., 2015

Side-Channel Protection by Randomizing Look-Up Tables on Reconfigurable Hardware - Pitfalls of Memory Primitives.
IACR Cryptol. ePrint Arch., 2015

2014
Fault Sensitivity Analysis Meets Zero-Value Attack.
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014

MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor - -Overhead Evaluation of Side-Channel Countermeasures-.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
One Attack to Rule Them All: Collision Timing Attack versus 42 AES ASIC Cores.
IEEE Trans. Computers, 2013

Comprehensive Evaluation of AES Dual Ciphers as a Side-Channel Countermeasure.
Proceedings of the Information and Communications Security - 15th International Conference, 2013

2012
Side channels as building blocks.
J. Cryptogr. Eng., 2012

On the Simplicity of Converting Leakages from Multivariate to Univariate - Case Study of a Glitch-Resistant Masking Scheme -
IACR Cryptol. ePrint Arch., 2012

IPSecco: A lightweight and reconfigurable IPSec core.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Glitch-free implementation of masking in modern FPGAs.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012

How Far Should Theory Be from Practice? - Evaluation of a Countermeasure.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012

2011
Collision Timing Attack when Breaking 42 AES ASIC Cores.
IACR Cryptol. ePrint Arch., 2011

MicroECC: A Lightweight Reconfigurable Elliptic Curve Crypto-processor.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Practical evaluation of DPA countermeasures on reconfigurable hardware.
Proceedings of the HOST 2011, 2011

On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined Setting.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011

2010
Correlation-Enhanced Power Analysis Collision Attack.
IACR Cryptol. ePrint Arch., 2010


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