Oliver Chiu-sing Choy
Orcid: 0000-0002-8370-3144Affiliations:
- Chinese University of Hong Kong
According to our database1,
Oliver Chiu-sing Choy
authored at least 115 papers
between 1994 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Proceedings of the IEEE International Conference on Signal Processing, 2023
2020
IEEE Trans. Instrum. Meas., 2020
2019
A 0.4 V 298 nJ/op Neural Signal Spectral Feature Extraction Module With Novel Approximate MACs and Custom Compressors.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Brillouin Optical Time Domain Analyzer Fiber Sensor Based on FPGA Accelerated Support Vector Regression.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A Subthreshold Baseband Processor Core Design With Custom Modules and Cells for Passive RFID Tags.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Access, 2018
Spatial temporal GRU convnets for vision-based real time epileptic seizure detection.
Proceedings of the 15th IEEE International Symposium on Biomedical Imaging, 2018
2017
Integrating channel selection and feature selection in a real time epileptic seizure detection system.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
2016
IEEE J. Biomed. Health Informatics, 2016
A 0.4V 320Mb/s 28.7µW 1024-bit configurable multiplier for subthreshold SOC encryption.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016
Proceedings of the IEEE International Workshop on Acoustic Signal Enhancement, 2016
Subthreshold Passive RFID Tag's Baseband Processor Core Design with Custom Modules and Cells.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Automatic seizure detection using correlation integral with nonlinear adaptive denoising and Kalman filter.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016
2015
A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Subthreshold passive RFID tag's baseband processor core design with custom modules and cells.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
2014
A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
A 2.5-Mbps, 170-cm transmission distance IntraBody communication receiver front end design and its synchronization technique research.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
A novel high speed, low power IntraBody Communication Receiver Front End based on sampling rate boosting switched-capacitor filter.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Proceedings of the IEEE International Symposium on Consumer Electronics, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
The Impact of Nodes Embedded with Data Processing Unit on Energy Consumption in a Wireless BAN.
Proceedings of the 4th International Conference on Ambient Systems, 2013
2012
Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase.
J. Signal Process. Syst., 2012
Robust, Low-Complexity, and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
J. Signal Process. Syst., 2010
A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders.
IEEE J. Solid State Circuits, 2010
J. Low Power Electron., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Performance evaluation of OFDM de-modulator with various multiplier architectures for UWB system.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
EURASIP J. Embed. Syst., 2009
A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264/AVC.
IEEE Trans. Circuits Syst. Video Technol., 2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
Low-Cost VC Allocator Design for Virtual Channel Wormhole Routers in Networks-on-Chip.
Proceedings of the Second International Symposium on Networks-on-Chips, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities.
J. VLSI Signal Process., 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
EURASIP J. Embed. Syst., 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
2006
IEEE J. Solid State Circuits, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
IEEE Trans. Consumer Electron., 2004
IEEE Trans. Circuits Syst. II Express Briefs, 2004
IEEE Trans. Circuits Syst. II Express Briefs, 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Proceedings of the Integrated Circuit and System Design, 2004
An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
An asynchronous SOVA decoder for wireless communication application.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
An IF input continuous-time sigma-delta analog-digital converter with high image rejection.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
Proceedings of the Smart Card Research and Advanced Applications VI, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
IEEE J. Solid State Circuits, 2003
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A low power asynchronous GF(2<sup>173</sup>) ALU for elliptic curve crypto-processor.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the ESSCIRC 2003, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
2001
IEEE J. Solid State Circuits, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A pipelined dataflow small micro-coded asynchronous processor and its application to DCT.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
IEEE Trans. Consumer Electron., 2000
IEEE Trans. Consumer Electron., 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of ASP-DAC 2000, 2000
1999
IEEE Trans. Circuits Syst. Video Technol., 1999
IEEE J. Solid State Circuits, 1999
Pipelined Dataflow Architecture of a Small Processor.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 24th EUROMICRO '98 Conference, 1998
1997
A low power-noise output driver with an adaptive characteristic applicable to a wide range of loading conditions.
IEEE J. Solid State Circuits, 1997
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Computers, 1996
1995
A Feedback Control Circuit Design Technique to Suppress Power Noise in High Speed Output Driver.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994