Nusrat Farzana
Orcid: 0009-0005-5096-3766
According to our database1,
Nusrat Farzana
authored at least 11 papers
between 2019 and 2024.
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Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024
Exploring the Abyss? Unveiling Systems-on-Chip Hardware Vulnerabilities Beneath Software.
IEEE Trans. Inf. Forensics Secur., 2024
IEEE Trans. Inf. Forensics Secur., 2024
Prioritizing Information Flow Violations: Generation of Ranked Security Assertions for Hardware Designs.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024
FormalFuzzer: Formal Verification Assisted Fuzz Testing for SoC Vulnerability Detection.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
2022
FSMx: Finite State Machine Extraction from Flattened Netlist With Application to Security.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
2021
ACM J. Emerg. Technol. Comput. Syst., 2021
SAIF: Automated Asset Identification for Security Verification at the Register Transfer Level.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021
2019
Proceedings of the IEEE International Test Conference, 2019