Nuno Horta

According to our database, Nuno Horta authored at least 155 papers between 1994 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks - A Tutorial Brief.

Gustavo Liñán Cembrano, Nuno Lourenço, Nuno Horta, José M. de la Rosa

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A 25 nW Heartbeat Monitoring Circuit for Wearable Applications in CMOS 65nm.

Rafael Vieira, Seyedehsomayeh Hatefinasab, Ricardo Martins, Nuno Horta, Nuno Lourenço

Proceedings of the 20th International Conference on Synthesis, 2024

Effective Routing Probability Maps via Convolutional Neural Networks for Analog IC Layout Automation.

Diogo Peneda, Filipe Azevedo, Nuno Lourenço, Nuno Horta, Ricardo Martins

Proceedings of the 20th International Conference on Synthesis, 2024

Ponderous: A Performance-driven Analog IC Placement Optimizer Leveraged by a ML Pipeline.

Ricardo Martins, António Gusmão, Rafael Vieira, Fábio Passos, Nuno Lourenço, Nuno Horta

Proceedings of the 20th International Conference on Synthesis, 2024

2023

Behavioral Analysis of Noise and Bandwidth Specifications of Heartbeat Detection Circuits for Ultra Low Power Devices.

Rafael Vieira, Fábio Passos, Ricardo Martins, Nuno Horta, Nuno Lourenço

IEEE Access, 2023

Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals.

Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço

Proceedings of the 19th International Conference on Synthesis, 2023

A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology.

Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta

Proceedings of the 19th International Conference on Synthesis, 2023

An ANN-Based Approach to the Modelling and Simulation of Analogue Circuits.

André Amaral, António Gusmão, Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço

Proceedings of the 19th International Conference on Synthesis, 2023

Efficient Hierarchical mm-Wave System Synthesis with Embedded Accurate Transformer and Balun Machine Learning Models.

Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Surrogate-assisted automatic evolving of dispatching rules for multi-objective dynamic job shop scheduling using genetic programming.

Yannik Zeiträg, José Rui Figueira, Nuno Horta, Rui Neves

Expert Syst. Appl., 2022

Scalable and order invariant analog integrated circuit placement with Attention-based Graph-to-Sequence deep models.

António Paiva Lapas de Gusmão, Nuno Cavaco Gomes Horta, Nuno Calado Correia Lourenço, Ricardo Miguel Ferreira Martins

Expert Syst. Appl., 2022

DeepPlacer: A custom integrated OpAmp placement tool using deep models.

António Gusmão, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins

Appl. Soft Comput., 2022

Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling.

Rafael Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins, Nuno Horta, Jorge Guilherme, Nuno Lourenço

Proceedings of the 18th International Conference on Synthesis, 2022

Machine Learning Approaches for Transformer Modeling.

Fábio Passos, Nuno C. Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández

Proceedings of the 18th International Conference on Synthesis, 2022

Accelerating Voltage-Controlled Oscillator Sizing Optimizations with ANN-based Convergence Classifiers and Frequency Guess Predictors.

João Domingues, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins

Proceedings of the 18th International Conference on Synthesis, 2022

ANN-based Analog IC Floorplan Recommender with a Broader Topological Constraints Coverage.

Pedro Alves, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins

Proceedings of the 18th International Conference on Synthesis, 2022

Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient.

Nuno Lourenço, Fábio Passos, Rafael Vieira, Ricardo Martins, Nuno Horta, Jorge Guilherme, Ricardo Póvoa

Proceedings of the 18th International Conference on Synthesis, 2022

Speeding-Up Complex RF IC Sizing Optimizations with a Process, Voltage and Temperature Corner Performance Estimator based on ANNs.

Pedro Vaz, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications.

Fábio Passos, Rafael Vieira, António Canelas, Ricardo Póvoa, Nuno Lourenço, Nuno Horta, Jorge Guilherme

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing.

Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta

Eng. Appl. Artif. Intell., 2021

Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs.

António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández

IEEE Access, 2021

Late Breaking Results: Attention in Graph2Seq Neural Networks towards Push-Button Analog IC Placement.

António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications.

Ricardo Póvoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes

IEEE Trans. Circuits Syst. II Express Briefs, 2020

Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools.

Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins

IEEE Trans. Circuits Syst., 2020

FUZYE: A Fuzzy <i>c</i>-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms.

António Canelas, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications.

Ricardo Póvoa, Richa Arya, António Canelas, Fábio Passos, Ricardo Martins, Nuno Lourenço, Nuno Horta

Microelectron. J., 2020

A new family of CMOS inverter-based OTAs for biomedical and healthcare applications.

Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes

Integr., 2020

Enhancing a Pairs Trading strategy with the application of Machine Learning.

Simão Moraes Sarmento, Nuno Horta

Expert Syst. Appl., 2020

Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology.

Fábio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenço, Saiyd Ahyoune, Javier J. Sieiro, Rafael Castro-López, Nuno Horta, Francisco V. Fernández

IEEE Access, 2020

Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender.

António Gusmão, Fábio Passos, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Analog IC Placement Generation via Neural Networks from Unlabeled Data

António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins

Springer, ISBN: 978-3-030-50060-3, 2020

2019

Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications.

Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins

IEEE Trans. Very Large Scale Integr. Syst., 2019

Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop.

Ricardo Martins, Nuno Lourenço, Fábio Passos, Ricardo Povoa, António Canelas, Elisenda Roca, Rafael Castro-López, Javier J. Sieiro, Francisco V. Fernández, Nuno Horta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Multi-objective framework for cost-effective OTN switch placement using NSGA-II with embedded domain knowledge.

Daniela Moniz, João Pedro, Nuno Horta, João Pires

Appl. Soft Comput., 2019

A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers.

Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes

Proceedings of the 16th International Conference on Synthesis, 2019

Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries.

Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández

Proceedings of the 16th International Conference on Synthesis, 2019

Artificial Neural Networks as an Alternative for Automatic Analog IC Placement.

Daniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins

Proceedings of the 16th International Conference on Synthesis, 2019

Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing.

Nuno Lourenço, Engin Afacan, Ricardo Martins, Fábio Passos, António Canelas, Ricardo Póvoa, Nuno Horta, Günhan Dündar

Proceedings of the 16th International Conference on Synthesis, 2019

On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects.

Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta

Proceedings of the 16th International Conference on Synthesis, 2019

Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm.

Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins

Proceedings of the 16th International Conference on Synthesis, 2019

Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization.

Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Póvoa, Nuno Horta, Emmanuel Moutaye

Proceedings of the 16th International Conference on Synthesis, 2019

2018

Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving.

Ricardo Povoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes

IEEE Trans. Circuits Syst. II Express Briefs, 2018

Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement.

Ricardo Povoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Cavaco Gomes Horta, João Goes

IEEE Trans. Circuits Syst. II Express Briefs, 2018

Centralized Unmanned Aerial Vehicle Mesh Network Placement Scheme: A Multi-Objective Evolutionary Algorithm Approach.

Sérgio Sabino, Nuno Horta, António Grilo

Sensors, 2018

Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology.

Fábio Passos, Ricardo Martins, Nuno Lourenço, Elisenda Roca, Ricardo Povoa, António Canelas, Rafael Castro-López, Nuno Horta, Francisco V. Fernández

Integr., 2018

Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017.

Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi

Integr., 2018

Second-order compensation BGR with low TC and high performance for space applications.

Jonathan Calvillo, Ricardo Póvoa, Jorge Guilherme, Nuno Horta

Integr., 2018

Parallel SAX/GA for financial pattern matching using NVIDIA's GPU.

João Baúto, António Canelas, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2018

Currency exchange prediction using machine learning, genetic algorithms and technical analysis.

Gonçalo Abreu, Rui Ferreira Neves, Nuno Horta

CoRR, 2018

Reinforcement learning applied to Forex trading.

João Carapuço, Rui Ferreira Neves, Nuno Horta

Appl. Soft Comput., 2018

Combining Support Vector Machine with Genetic Algorithms to optimize investments in Forex markets with high leverage.

Bernardo Jubert de Almeida, Rui Ferreira Neves, Nuno Horta

Appl. Soft Comput., 2018

Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs.

Fábio Passos, Ricardo Martins, Nuno C. Lourenço, Elisenda Roca, Rafael Castro-López, Ricardo Povoa, António Canelas, Nuno Horta, Francisco V. Fernández

Proceedings of the 15th International Conference on Synthesis, 2018

A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications.

António Canelas, Ricardo Povoa, Ricardo M. F. Martins, Nuno Lourenço, Jorge Guilherme, Nuno Horta

Proceedings of the 15th International Conference on Synthesis, 2018

On the Exploration of Promising Analog IC Designs via Artificial Neural Networks.

Nuno Lourenço, Joao Rosa, Ricardo Martins, Helena Aidos, António Canelas, Ricardo Povoa, Nuno Horta

Proceedings of the 15th International Conference on Synthesis, 2018

Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications.

Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins

Proceedings of the 15th International Conference on Synthesis, 2018

11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology.

Rodrigo Granja, Mauro Santos, Jorge Guilherme, Nuno Horta

Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations.

Jigme Zangpo, Ricardo Povoa, Jorge Guilherme, Nuno Horta

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel.

Tiago Pessoa, Nuno Lourenço, Ricardo Martins, Ricardo Povoa, Nuno Horta

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Stochastic-based placement template generator for analog IC layout-aware synthesis.

Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta

Integr., 2017

Introduction to the special issue on PRIME 2016 and SMACD 2016.

Nuno Horta, Andrea Baschirotto, Francisco V. Fernández, Günhan Dündar, João Goes, Jorge Fernandes

Integr., 2017

Company event popularity for financial markets using Twitter and sentiment analysis.

Mariana Daniel, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2017

Systematic design of a voltage controlled oscillator using a layout-aware approach.

Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno C. G. Horta

Proceedings of the 14th International Conference on Synthesis, 2017

Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks.

Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández

Proceedings of the 14th International Conference on Synthesis, 2017

New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization.

Nuno C. Lourenço, Ricardo Martins, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández

Proceedings of the 14th International Conference on Synthesis, 2017

Design of a BGR Suitable for the Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C.

Jonathan Calvillo, Jorge Guilherme, Nuno Horta

Proceedings of the New Generation of CAS, 2017

Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing.

António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Automatic technology migration of analog IC designs using generic cell libraries.

Jose Cachaco, Nuno Machado, Nuno Lourenço, Jorge Guilherme, Nuno Horta

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Using sentiment from Twitter optimized by Genetic Algorithms to predict the stock market.

Carlos Simões, Rui Ferreira Neves, Nuno Horta

Proceedings of the 2017 IEEE Congress on Evolutionary Computation, 2017

2016

Logarithmic AD Converter With Selectable Transfer Characteristic.

Mauro Santos, Nuno Horta, Jorge Guilherme

IEEE Trans. Circuits Syst. II Express Briefs, 2016

Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques.

Ricardo Povoa, Ivan Bastos, Nuno Lourenço, Nuno Horta

Integr., 2016

Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer.

Mrinalinee Pandey, António Canelas, Ricardo Póvoa, Jorge Alves Torres, João Costa Freire, Nuno Lourenço, Nuno Horta

Integr., 2016

Current-flow and current-density-aware multi-objective optimization of analog IC placement.

Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta

Integr., 2016

AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation.

Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Povoa, Nuno Horta

Integr., 2016

Introduction to the special issue on SMACD 2015.

Günhan Dündar, Nuno Horta, Francisco V. Fernández

Integr., 2016

A Novel Approach for Optimization in Dynamic Environments Based on Modified Artificial Fish Swarm Algorithm.

Danial Yazdani, Alireza Sepas-Moghaddam, Atabak Dehban, Nuno Horta

Int. J. Comput. Intell. Appl., 2016

Multi-objective kernel mapping and scheduling for morphable many-core architectures.

Nuno Neves, Rui Neves, Nuno Horta, Pedro Tomás, Nuno Roma

Expert Syst. Appl., 2016

Combining rules between PIPs and SAX to identify patterns in financial markets.

João Leitão, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2016

SCALES: A high speed simulator tool for pipeline A/D converters.

Carlos Silva, Jorge Guilherme, Nuno Horta

Proceedings of the 13th International Conference on Synthesis, 2016

Automated analog IC design constraints generation for a layout-aware sizing approach.

Andre Ferreira, Nuno Lourenço, Ricardo Martins, Nuno Horta

Proceedings of the 13th International Conference on Synthesis, 2016

Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations.

António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta

Proceedings of the 13th International Conference on Synthesis, 2016

On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies.

Ricardo Martins, António Canelas, Nuno Lourenço, Nuno Horta

Proceedings of the 13th International Conference on Synthesis, 2016

Design automation tasks scheduling for enhanced parallel execution of a state-of-the-art layout-aware sizing approach.

David Neves, Ricardo Martins, Nuno Lourenço, Nuno Horta

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Floorplan-aware analog IC sizing and optimization based on topological constraints.

Nuno Lourenço, António Canelas, Ricardo Povoa, Ricardo Martins, Nuno Horta

Integr., 2015

A hybrid approach to portfolio composition based on fundamental and technical indicators.

António Silva, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2015

Boosting Trading Strategies performance using VIX indicator together with a dual-objective Evolutionary Computation optimizer.

José Matias Pinto, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2015

Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates.

Ricardo Martins, Nuno Lourenço, Nuno Horta

Expert Syst. Appl., 2015

A multi-objective routing algorithm for Wireless Multimedia Sensor Networks.

Naércio Magaia, Nuno Horta, Rui Ferreira Neves, Paulo Rogério Pereira, Miguel Correia

Appl. Soft Comput., 2015

A voltage-combiners-biased amplifier with enhanced gain and speed using current starving.

Ricardo Povoa, Nuno Lourenço, Nuno Horta, João Goes

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Extraction and application of wiring symmetry rules to route analog multiport terminals.

Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Thermal-aware floorplanning and layout generation of MOSFET power stages.

David Guilherme, João Pereira, Nuno Horta, Jorge Guilherme

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Developing Multi-Time Frame Trading Rules with a Trend Following Strategy, using GA.

Jaime Machado, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2015

Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction.

Nuno Lourenço, Ricardo Martins, Nuno Horta

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

A survey on nonlinear analog-to-digital converters.

Mauro Santos, Nuno Horta, Jorge Guilherme

Integr., 2014

Electromigration-aware analog Router with multilayer multiport terminal structures.

Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta

Integr., 2014

LC-VCO automatic synthesis using multi-objective evolutionary techniques.

Ricardo Povoa, Ricardo Lourenco, Nuno Lourenço, António Canelas, Ricardo Martins, Nuno Horta

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Multi-objective Optimization of Investment Strategies - Based on Evolutionary Computation Techniques, in Volatile Environments.

José Matias Pinto, Rui Ferreira Neves, Nuno Horta

Proceedings of the ICEIS 2014, 2014

A rad-hard DC-DC converter controller.

Bruno Silva, Nuno Horta, Jorge Guilherme

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Logarithmic AD conversion using latched comparators and a time-to-digital converter.

Mauro Santos, Nuno Horta, Jorge Guilherme

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner.

Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Automatic layout generation of power MOSFET transistors in bulk CMOS.

David Guilherme, Nuno Horta, Jorge Guilherme

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Electromigration-aware and IR-Drop avoidance routing in analog multiport terminal structures.

Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Portfolio optimization using fundamental indicators based on multi-objective EA.

António Silva, Rui Ferreira Neves, Nuno Horta

Proceedings of the IEEE Conference on Computational Intelligence for Financial Engineering & Economics, 2014

2013

LAYGEN II - Automatic Layout Generation of Analog Integrated Circuits.

Ricardo Martins, Nuno Lourenço, Nuno Horta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

A SAX-GA approach to evolve investment strategies on financial markets based on pattern discovery techniques.

António Canelas, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2013

Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners.

Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Enhancing a Layout-Aware Synthesis Methodology for Analog ICs by Embedding Statistical Knowledge into the Evolutionary Optimization Kernel.

Frederico Rocha, Ricardo Martins, Nuno Lourenço, Nuno Horta

Proceedings of the Technological Innovation for the Internet of Things, 2013

Optimizing investment strategies based on companies earnings using genetic algorithms.

Jorge Fonseca, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2013

Multi-dimensional pattern discovery in financial time series using sax-ga with extended robustness.

António Canelas, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2013

A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis.

Frederico Rocha, Nuno Lourenço, Ricardo Povoa, Ricardo Martins, Nuno Horta

Proceedings of the IEEE Congress on Evolutionary Computation, 2013

Multi-port multi-terminal analog router based on an evolutionary optimization kernel.

Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta

Proceedings of the IEEE Congress on Evolutionary Computation, 2013

2012

Solving a Capacitated Exam Timetabling Problem Instance Using a Bi-objective NSGA-II.

Nuno Leite, Rui Ferreira Neves, Nuno Horta, Fernando Melicio, Agostinho C. Rosa

Proceedings of the Computational Intelligence - International Joint Conference, 2012

Solving an Uncapacitated Exam Timetabling Problem Instance using a Hybrid NSGA-II.

Nuno Leite, Rui Ferreira Neves, Nuno Horta, Fernando Melicio, Agostinho C. Rosa

Proceedings of the IJCCI 2012 - Proceedings of the 4th International Joint Conference on Computational Intelligence, Barcelona, Spain, 5, 2012

An evolutionary approach to define investment strategies based on macroeconomic indicators and VIX data.

Oleksandr Yefimochkin, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2012

Automated passive filter design using multi-objective genetic algorithms with variable parameters.

José Pinto, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2012

LAYGEN II: automatic analog ICs layout generator based on a template approach.

Ricardo Martins, Nuno Lourenço, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2012

GENOM-POF: multi-objective evolutionary synthesis of analog ICs with corners validation.

Nuno Lourenço, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2012

A new SAX-GA methodology applied to investment strategies optimization.

António Canelas, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2012

2011

Applying a GA kernel on optimizing technical analysis rules for stock picking and portfolio composition.

António Gorgulho, Rui Ferreira Neves, Nuno Horta

Expert Syst. Appl., 2011

Optimal OpAmp sizing based on a fuzzy-genetic kernel.

Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta

Proceedings of the 13th Annual Genetic and Evolutionary Computation Conference, 2011

Fitness function evaluation for MA trading strategies based on genetic algorithms.

José Pinto, Rui Ferreira Neves, Nuno Horta

Proceedings of the 13th Annual Genetic and Evolutionary Computation Conference, 2011

Overcurrent detection circuit for integrated class-D amplifiers.

Frederico Cadete, David Guilherme, Jorge Guilherme, Nuno Horta

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

Trading with optimized uptrend and downtrend pattern templates using a genetic algorithm kernel.

Paulo Parracho, Rui Ferreira Neves, Nuno Horta

Proceedings of the IEEE Congress on Evolutionary Computation, 2011

2010

Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques

Manuel F. M. Barros, Jorge M. C. Guilherme, Nuno C. G. Horta

Studies in Computational Intelligence 294, Springer, ISBN: 978-3-642-12345-0, 2010

Analog circuits optimization based on evolutionary computation techniques.

Manuel F. M. Barros, Jorge Guilherme, Nuno Horta

Integr., 2010

An Innovative GA Optimized Investment Strategy based on a New Technical Indicator using Multiple MAS.

Adriano Simões, Rui Ferreira Neves, Nuno Horta

Proceedings of the ICEC 2010 - Proceedings of the International Conference on Evolutionary Computation, [part of the International Joint Conference on Computational Intelligence IJCCI 2010], Valencia, Spain, October 24, 2010

Trading in financial markets using pattern recognition optimized by genetic algorithms.

Paulo Parracho, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2010

2009

Reconfigurable multi-mode sigma-delta modulator for 4G mobile terminals.

Artur Silva, Jorge Guilherme, Nuno Horta

Integr., 2009

FUGA: a fuzzy-genetic analog circuit optimization kernel.

Pedro Sousa, Carla Duarte, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2009

Using GAs to balance technical indicators on stock picking for financial portfolio composition.

António Gorgulho, Rui Ferreira Neves, Nuno Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2009

Enhancing analog IC design optimization kernels with simple fuzzy models.

Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008

A reconfigurable A/D converter for 4G wireless systems.

Artur Silva, Nuno Horta, Jorge Guilherme

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Overview of radiation effects and design constraints off fully custom SMPS.

Mauro Santos, Carlos Pires, Jorge Guilherme, Nuno Horta

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

GA-SVM feasibility model and optimization kernel applied to analog IC design automation.

Manuel F. M. Barros, Jorge Guilherme, Nuno Horta

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Automatic analog IC layout generation based on a evolutionary computation approach.

Nuno C. Lourenço, Nuno C. G. Horta

Proceedings of the Genetic and Evolutionary Computation Conference, 2007

Design of a multimode reconfigurable sigma-delta converter for 4G wireless receivers.

Artur Silva, Nuno Horta, Jorge Guilherme

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design.

Manuel F. M. Barros, Jorge Guilherme, Nuno Horta

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006

AIDA: Analog IC Design Automation based on a Fully Configurable Design Hierarchy and Flow.

Gonçalo Neves, Manuel F. M. Barros, Nuno Horta

Proceedings of the 13th IEEE International Conference on Electronics, 2006

GA-SVM Optimization Kernel applied to Analog IC Design Automation.

Manuel F. M. Barros, Jorge Guilherme, Nuno Horta

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Laygen - An evolutionary approach to automatic analog IC layout generation.

Nuno Lourenço, Nuno Horta

Proceedings of the 12th IEEE International Conference on Electronics, 2005

Fuzzy Chess Tactics.

João Paulo Carvalho, Nuno Cavaco Gomes Horta, Daniel Chang Yan, Pedro Ramos e Silva

Proceedings of the Joint 4th Conference of the European Society for Fuzzy Logic and Technology and the 11th Rencontres Francophones sur la Logique Floue et ses Applications, 2005

2004

Enhancing the SCORM metadata model.

David Simões, Rui Luís, Nuno Horta

Proceedings of the 13th international conference on World Wide Web, 2004

Enhancing the SCORM Modelling Scope.

David Simões, Rui Luís, Nuno Horta

Proceedings of the IEEE International Conference on Advanced Learning Technologies, 2004

A Multi-Level Model for Tracking Analysis in E-Learning Platforms.

Rui Luís, David Simões, Nuno Horta

Proceedings of the IEEE International Conference on Advanced Learning Technologies, 2004

2003

Enhanced genetic algorithm kernel applied to a circuit-level optimization E-design environment.

Manuel F. M. Barros, João Silva, Gonçalo Neves, Nuno Cavaco Gomes Horta

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

VIANET - A New Web Framework for Distance Learning.

João Redol, David Simões, A. Carvalho, H. Páscoa, J. Coelho, Paulo Grave, Rui Luís, Nuno Horta

Proceedings of the 2003 IEEE International Conference on Advanced Learning Technologies, 2003

A New Approach towards E-Learning Content Standardization and Enhanced Usability.

David Simões, João Redol, Rui Luís, Alberto Carvalho, H. Páscoa, J. Coelho, Paulo Grave, Nuno Horta

Proceedings of the IADIS International Conference WWW/Internet 2003, 2003

2002

GENOM: circuit-level optimizer based on a modified genetic algorithm kernel.

João Silva, Nuno Cavaco Gomes Horta

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Towards a Framework for Semantic Service Discovery in Ubiquitous P2P Enviroments.

José Iria, Nuno Horta, Agostinho David

Proceedings of the International Conference on Internet Computing, 2002

2001

IC design automation from circuit level optimization to retargetable layout.

Xu Jingnan, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

A Skill-based library for retargetable embedded analog cores.

Xu Jingnan, João C. Vital, Nuno Horta

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Symbolic techniques applied to switched-current ADCs synthesis.

Nuno Horta, Maria Fino, João Goes

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

RAPID-retargetability for reusability of application-driven quadrature D/A interface block design.

José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

Symbolic synthesis of non-linear data converters.

Jorge Guilherme, Nuno C. G. Horta, José E. Franca

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1997

Algorithm-driven synthesis of data conversion architectures.

Nuno C. G. Horta, José E. Franca

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1994

A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms.

Nuno C. G. Horta, José E. Franca

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994