Novi Prihatiningrum

According to our database1, Novi Prihatiningrum authored at least 2 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Design of an Area-Efficient and Error-Reduced CMOS Approximate Adder.
Proceedings of the 21st International SoC Design Conference, 2024

2016
An architecture design of SAD based template matching for fast queue counter in FPGA.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016


  Loading...