Noura Benhadjyoussef

Orcid: 0000-0003-1001-9808

According to our database1, Noura Benhadjyoussef authored at least 9 papers between 2012 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

Online presence:

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Bibliography

2021
The DFA/DFT-based hacking techniques and countermeasures: Case study of the 32-bit AES encryption crypto-core.
IET Comput. Digit. Tech., 2021

2020
A Hybrid Countermeasure-Based Fault-Resistant AES Implementation.
J. Circuits Syst. Comput., 2020

A Hardware-Software Codesign Case Study: The SHA3-512 algorithm Implementation on the LEON3 Processor.
Proceedings of the 5th International Conference on Advanced Technologies for Signal and Image Processing, 2020

The Secured AES designs against Fault Injection Attacks: A comparative Study.
Proceedings of the 5th International Conference on Advanced Technologies for Signal and Image Processing, 2020

2015
Enhancing a 32-Bit Processor Core with Efficient Cryptographic Instructions.
J. Circuits Syst. Comput., 2015

2014
A low-resource 32-bit datapath ECDSA design for embedded applications.
Proceedings of the International Carnahan Conference on Security Technology, 2014

Instruction set extensions of AES algorithms for 32-bit processors.
Proceedings of the International Carnahan Conference on Security Technology, 2014

2012
Implementation of CPA analysis against AES design on FPGA.
Proceedings of the International Conference on Communications and Information Technology, 2012

A compact 32-bit AES design for embedded system.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012


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