Noriaki Oda

According to our database, Noriaki Oda authored at least 4 papers between 2006 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2008

Statistical Corner Conditions of Interconnect Delay (Corner LPE Specifications).

Kenta Yamada, Noriaki Oda

IEICE Trans. Electron., 2008

Accurate Modeling Method for Cu Interconnect.

Kenta Yamada, Hiroshi Kitahara, Yoshihiko Asai, Hideo Sakamoto, Norio Okada, Makoto Yasuda, Noriaki Oda, Michio Sakurai, Masayuki Hiroi, Toshiyuki Takewaki, Sadayuki Ohnishi, Manabu Iguchi, Hiroyasu Minda, Mieko Suzuki

IEICE Trans. Electron., 2008

2007

Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation.

Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno

IEICE Trans. Electron., 2007

2006

Chip-Level Performance Improvement Using Triple Damascene Wiring Design Concept for the 0.13 µm CMOS Generation and Beyond.

Noriaki Oda, Hiroyuki Kunishima, Takashi Kyouno, Kazuhiro Takeda, Tomoaki Tanaka, Toshiyuki Takewaki, Masahiro Ikeda

IEICE Trans. Electron., 2006