Norbert Seifert

According to our database, Norbert Seifert authored at least 19 papers between 2005 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

A Reliability Overview of Intel's 10+ Logic Technology.

Rohit Grover, Tony Acosta, C. AnDyke, Emre Armagan, C. Auth, Sunny Chugh, K. Downes, M. Hattendorf, N. Jack, S. Joshi, R. Kasim, Gerald S. Leatherman, S.-H. Lee, C.-Y. Lin, A. Madhavan, H. Mao, A. Lowrie, G. Martin, G. McPherson, Pinakpani Nayak, Adam Neale, D. Nminibapiel, Benjamin Orr, James Palmer, C. M. Pelto, S. S. Poon, I. Post, Tanmoy Pramanik, Anisur Rahman, Stephen Ramey, Norbert Seifert, K. Sethi, Anthony Schmitz, H. Wu, A. Yeoh

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

On the Correlation of Laser-induced and High-Energy Proton Beam-induced Single Event Latchup.

Bahar Ajdari, Samwel Sekwao, Ricardo Ascázubi, Adam Neale, Norbert Seifert

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2015

MBU-Calc: A compact model for Multi-Bit Upset (MBU) SER estimation.

Wei Wu, Norbert Seifert

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets.

Norbert Seifert, Shah M. Jahinuzzaman, Jyothi Velamala, Nikunj Patel

Proceedings of the IEEE International Reliability Physics Symposium, 2015

2013

Timing vulnerability factors of sequential elements in modern microprocessors.

Arkady Bramnik, Andrei Sherban, Norbert Seifert

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2010

Radiation-induced Soft Errors: A Chip-level Modeling Perspective.

Norbert Seifert

Found. Trends Electron. Des. Autom., 2010

Explaining cache SER anomaly using DUE AVF measurement.

Arijit Biswas, Charles Recchia, Shubhendu S. Mukherjee, Vinod Ambrose, Leo Chan, Aamer Jaleel, Athanasios E. Papathanasiou, Mike Plaster, Norbert Seifert

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

2008

Soft Error Rates of Hardened Sequentials utilizing Local Redundancy.

Norbert Seifert

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

Special Session 1: Radiation Hardening Techniques.

Norbert Seifert

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2007

Design for Resilience to Soft Errors and Variations.

Ming Zhang, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Soft Errors: Technology Trends, System Effects, and Protection Techniques.

Subhasish Mitra, Pia N. Sanda, Norbert Seifert

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

2006

Sequential Element Design With Built-In Soft Error Resilience.

Ming Zhang, Subhasish Mitra, T. M. Mak, Norbert Seifert, Nicholas J. Wang, Quan Shi, Kee Sup Kim, Naresh R. Shanbhag, Sanjay J. Patel

IEEE Trans. Very Large Scale Integr. Syst., 2006

Soft Error Resilient System Design through Error Correction.

Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim

Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006

Combinational Logic Soft Error Correction.

Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim

Proceedings of the 2006 IEEE International Test Conference, 2006

Extending Moore's Law into the next Decade - the SER Challenge.

Norbert Seifert

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

2005

Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim.

Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim

Computer, 2005

Logic soft errors: a major barrier to robust platform design.

Subhasish Mitra, Ming Zhang, T. M. Mak, Norbert Seifert, Victor Zia, Kee Sup Kim

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Node sensitivity analysis for soft errors in CMOS logic.

Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff, Norbert Seifert

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Logic soft errors in sub-65nm technologies design and CAD challenges.

Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang

Proceedings of the 42nd Design Automation Conference, 2005