Norbert Felber

According to our database, Norbert Felber authored at least 59 papers between 1991 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Low-power multichannel spectro-temporal feature extraction circuit for audio pattern wake-up.

Dinko Oletic, Vedran Bilas, Michele Magno, Norbert Felber, Luca Benini

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014

Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers.

Christoph Keller, Frank K. Gürkaynak, Hubert Kaeslin, Norbert Felber

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Live demonstration: Real-time audio restoration using sparse signal recovery.

David E. Bellasi, Patrick Maechler, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A Security-Enhanced UHF RFID Tag Chip.

Johann Ertl, Thomas Plos, Martin Feldhofer, Norbert Felber, Luca Henzen

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

VLSI Design of Approximate Message Passing for Signal Restoration and Compressive Sensing.

Patrick Maechler, Christoph Studer, David E. Bellasi, Arian Maleki, Andreas Burg, Norbert Felber, Hubert Kaeslin, Richard G. Baraniuk

IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

FPGA-Based High-Speed Authenticated Encryption System.

Michael Muehlberghuber, Christoph Keller, Frank K. Gürkaynak, Norbert Felber

Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012

100 Gbit/s authenticated encryption based on quantum key distribution.

Michael Muehlberghuber, Christoph Keller, Norbert Felber, Christian Pendl

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Hardware-efficient random sampling of fourier-sparse signals.

Patrick Maechler, Norbert Felber, Hubert Kaeslin, Andreas Burg

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Compressive sensing for WiFi-based passive bistatic radar.

Patrick Maechler, Norbert Felber, Hubert Kaeslin

Proceedings of the 20th European Signal Processing Conference, 2012

Sparsity-based real-time audio restoration.

Patrick Maechler, David E. Bellasi, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer

Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011

Random sampling ADC for sparse spectrum sensing.

Patrick Maechler, Norbert Felber, Andreas Peter Burg

Proceedings of the 19th European Signal Processing Conference, 2011

2010

Signal Transmission by Galvanic Coupling Through the Human Body.

Marc Simon Wegmueller, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner

IEEE Trans. Instrum. Meas., 2010

Low-Resource Hardware Design of an Elliptic Curve Processor for Contactless Devices.

Erich Wenger, Martin Feldhofer, Norbert Felber

Proceedings of the Information Security Applications - 11th International Workshop, 2010

Matching pursuit: Evaluation and implementatio for LTE channel estimation.

Patrick Maechler, Pierre Greisen, Norbert Felber, Andreas Burg

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Galvanic Coupling Enabling Wireless Implant Communications.

Marc Simon Wegmueller, Sonja Huclova, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner

IEEE Trans. Instrum. Meas., 2009

Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed.

Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed.

Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT.

Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

IEEE Trans. Very Large Scale Integr. Syst., 2008

ECC Is Ready for RFID - A Proof in Silicon.

Daniel M. Hein, Johannes Wolkerstorfer, Norbert Felber

Proceedings of the Selected Areas in Cryptography, 15th International Workshop, SAC 2008, 2008

Multi-user MIMO testbed.

Peter Luethi, Markus Wenk, Thomas Koch, Wolfgang Fichtner, Michael Lerjen, Norbert Felber

Proceedings of the Third ACM Workshop on Wireless Network Testbeds, 2008

FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM.

Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

A transform, lighting and setup ASIC for surface splatting.

Simon Heinzle, Olivier Saurer, Sebastian Axmann, Diego Browarnik, Andreas Schmidt, Flavio Carbognani, Peter Luethi, Norbert Felber, Markus H. Gross

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison.

Peter Luethi, Christoph Studer, Sebastian Duetsch, Eugen Zgraggen, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

A hardware architecture for surface splatting.

Tim Weyrich, Simon Heinzle, Timo Aila, Daniel Bernhard Fasnacht, Stephan Oetiker, Mario Botsch, Cyril Flaig, Simon Mall, Kaspar Rohrer, Norbert Felber, Hubert Kaeslin, Markus H. Gross

ACM Trans. Graph., 2007

An Attempt to Model the Human Body as a Communication Channel.

Marc Simon Wegmueller, Andreas Kuhn, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner

IEEE Trans. Biomed. Eng., 2007

VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition.

Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

FFT Processor for OFDM Channel Estimation.

Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Reduced-complexity mimo detector with close-to ml error rate performance.

C. Hess, Markus Wenk, Andreas Burg, Peter Luethi, Christoph Studer, Norbert Felber, Wolfgang Fichtner

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication.

Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

Multi-gigabit GCM-AES Architecture Optimized for FPGAs.

Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli

Proceedings of the Cryptographic Hardware and Embedded Systems, 2007

2006

K-best MIMO detection VLSI architectures achieving up to 424 Mbps.

Markus Wenk, Martin Zellweger, Andreas Burg, Norbert Felber, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Silicon implementation of an MMSE-based soft demapper for MIMO-BICM.

Simon Haene, Andreas Burg, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

42% power savings through glitch-reducing clocking strategy in a hearing aid application.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems.

Andreas Burg, Simon Haene, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Frame-Start Detector for a 4×4 MIMO-OFDM System.

David Perels, Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

Two-phase resonant clocking for ultra-low-power hearing aid applications.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.

Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 43rd Design Automation Conference, 2006

GALS at ETH Zurich: Success or Failure.

Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005

Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC.

Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the Second Workshop on Globally Asynchronous, Locally Synchronous Design, 2005

Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications.

Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the Integrated Circuit and System Design, 2005

ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs.

David Perels, Simon Haene, Peter Luethi, Andreas Peter Burg, Norbert Felber, Wolfgang Fichtner, Helmut Bölcskei

Proceedings of the 31st European Solid-State Circuits Conference, 2005

Improving DPA security by using globally-asynchronous locally-synchronous systems.

Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 31st European Solid-State Circuits Conference, 2005

A 0.67-mm² 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids.

Flavio Carbognani, Felix Bürgin, Luca Henzen, Herbert Koch, Hovig Magdassian, Christoph Pedretti, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004

A 2 Gb/s balanced AES crypto-chip implementation.

Frank K. Gürkaynak, Andreas Burg, Norbert Felber, Wolfgang Fichtner, D. Gasser, Franco Hug, Hubert Kaeslin

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Towards an AES crypto-chip resistant to differential power analysis.

Norbert Pramstaller, Frank K. Gürkaynak, Simon Haene, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

VLSI implementation of the sphere decoding algorithm.

Andreas Burg, Markus Wenk, Martin Zellweger, Marc Simon Wegmueller, Norbert Felber, Wolfgang Fichtner

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003

Waveform coding for low-power digital filtering of speech data.

Jürgen Wassner, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

IEEE Trans. Signal Process., 2003

A 50 Mbps 4×4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation.

Andreas Burg, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002

A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems.

Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

2001

Design and Verification of a Stack Processor Virtual Component.

Manfred Stadler, Markus Thalmann, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

IEEE Micro, 2001

A new approach for controlling series-connected IGBT modules.

Jan Thalheim, Norbert Felber, Wolfgang Fichtner

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

A 30-frames/s megapixel real-time CMOS image processor.

Daniel Doswald, Jürg Häfliger, Patrick Blessing, Norbert Felber, Peter Niederer, Wolfgang Fichtner

IEEE J. Solid State Circuits, 2000

A new paradigm for very flexible SONET/SDH IP-modules.

Thomas Roewer, Manfred Stadler, Markus Thalmann, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor.

Manfred Stadler, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, Markus Thalmann

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

An embedded stack microprocessor for SDH telecommunication applications.

Manfred Stadler, Markus Thalmann, Thomas Röwer, Norbert Felber, Wolfgang Fichtner

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1994

A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm.

Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

IEEE J. Solid State Circuits, March, 1994

1993

VINCI: Secure Test of a VLSI High-Speed Encryption System.

Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Reto Zimmermann, Wolfgang Fichtner

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1991

VLSI Implementation of a New Block Cipher.

Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Xuejia Lai

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991