Nobuyuki Yamashita
According to our database1,
Nobuyuki Yamashita
authored at least 11 papers
between 1992 and 2005.
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Bibliography
2005
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
1996
IMAP-VISION: An SIMD Processor with High-Speed On-chip Memory and Large Capacity External Memory.
Proceedings of IAPR Workshop on Machine Vision Applications, 1996
An integrated memory array processor with a synchronous-DRAM interface for real-time vision applications.
Proceedings of the 13th International Conference on Pattern Recognition, 1996
1995
Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications.
IEEE J. Solid State Circuits, June, 1995
A compact real-time vision system using integrated memory array processor architecture.
IEEE Trans. Circuits Syst. Video Technol., 1995
1994
A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM.
IEEE J. Solid State Circuits, November, 1994
Mach. Vis. Appl., 1994
Proceedings of IAPR Workshop on Machine Vision Applications, 1994
1992
Proceedings of IAPR Workshop on Machine Vision Applications, 1992