Nobuyuki Itoh

According to our database1, Nobuyuki Itoh authored at least 31 papers between 1988 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Study of Phase-Adjusting Architectures for Low-Phase-Noise Quadrature Voltage-Controlled Oscillators.
IEICE Trans. Electron., February, 2023

Study of 18.2-42.0GHz injection-locked frequency doubler with transformer input.
IEICE Electron. Express, 2023

2022
920MHz current-reuse low-power LNA operated in moderate inversion region.
IEICE Electron. Express, 2022

2021
Foreword.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

A quadrature voltage-controlled oscillator using phase-adjusting architecture for suppressing phase noise.
IEICE Electron. Express, 2021

Study of dual-band concurrent LNA equipping mutual inductive notch filter matching circuit.
IEICE Electron. Express, 2021

2018
Modeling and Layout Optimization of MOM Capacitor for High-Frequency Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

2016
A Study of Striped Inductor for K- and Ka-Band Voltage-Controlled Oscillators.
IEICE Trans. Electron., 2016

A study of current-reuse 800 MHz/1.9 GHz concurrent dual-band amplifier.
Proceedings of the 2016 IEEE Radio and Wireless Symposium, 2016

2014
High-Q MOS Varactor Models for Quasi-Millimeter-Wave Low-Noise LC-VCOs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

2013
Threshold levels for wettability in nano- and micro-meter periodic structures.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
A CMOS Class-G Supply Modulation for Polar Power Amplifiers with High Average Efficiency and Low Ripple Noise.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

2011
Digitally Assisted IIP2 Calibration for CMOS Direct-Conversion Receivers.
IEEE J. Solid State Circuits, 2011

A Single-Chip RF Tuner/OFDM Demodulator for Mobile Digital TV Application.
IEICE Trans. Electron., 2011

A 1.2-3.2 GHz CMOS VCO IC Utilizing Transformer-Based Variable Inductors and AMOS Varactors.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

2010
A Fully Integrated 2 ˟ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS.
IEEE J. Solid State Circuits, 2010

A Single-Chip 8-Band CMOS Transceiver for 3G Cellular Systems with Digital Interface.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

A 0.13 µm CMOS Bluetooth EDR Transceiver with High Sensitivity over Wide Temperature Range and Immunity to Process Variation.
IEICE Trans. Electron., 2010

A low-power low-noise direct-conversion front-end with digitally assisted IIP2 background self calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A fully integrated 2×1 dual-band direct-conversion transceiver with dual-mode fractional divider and noise-shaping TIA for mobile WiMAX SoC in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
15 GHz-band low phase-noise LC-VCO with second harmonic tunable filtering technique.
Proceedings of the IEEE 20th International Symposium on Personal, 2009


RF-analog circuit design in scaled SoC.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Session 18 - Millimeter-wave circuit techniques.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A 5.8-GHz ETC Transceiver Using SiGe-BiCMOS.
IEICE Trans. Electron., 2007

A SiGe BiCMOS VCO IC with Highly Linear Kvco for 5-GHz-Band Wireless LANs.
IEICE Trans. Electron., 2007

A -90 dBm sensitivity 0.13 μm CMOS bluetooth transceiver operating in wide temperature range.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005
High Sensitivity 900-MHz ISM Band Transceiver.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

2003
Scalable Parasitic Components Model of CMOS for RF Circuit Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2000
A 2-V CMOS cellular transceiver front-end.
IEEE J. Solid State Circuits, 2000

1988
An optimized 1.0- mu m CMOS technology for next-generation channelless gate arrays.
IEEE J. Solid State Circuits, April, 1988


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