Nobuo Tsuda

According to our database, Nobuo Tsuda authored at least 13 papers between 1989 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

Configurable PC Clusters Using a Hierarchical Complete-Connection-Based Switching Network.

Nobuo Tsuda

Proceedings of the 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 2002

2001

ABL-Tree: A Constant Diameter Interconnection Network for Reconfigurable Processor Arrays Capable of Distributed Communication .

Nobuo Tsuda

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000

Fault-Tolerant Processor Arrays Using Additional Bypass Linking Allocated by Graph-Node Coloring.

Nobuo Tsuda

IEEE Trans. Computers, 2000

Reconfigurable Mesh-Connected Processor Arrays Using Row-Column Bypassing and Direct Replacement.

Nobuo Tsuda, Tatsuyuki Shimizu

Proceedings of the 5th International Symposium on Parallel Architectures, 2000

Fault-Tolerant Ring- and Toroidal Mesh-Connected Processor Arrays Able to Enhance Emulation of Hypercubes.

Nobuo Tsuda

Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1997

Fault-Tolerant Hierarchical Interconnection Networks Constructed by Additional Bypass Linking with Graph-Node Coloring.

Nobuo Tsuda

Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

1996

Fault-Tolerant Shuffle-Exchange and de Bruijn Networks Capable of Quick Broadcasting.

Nobuo Tsuda

Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996

1995

A Rule-Embedded Neural-Network and Its Effectiveness in Pattern Recognition with III-Posed Conditions.

Mina Maruyama, Nobuo Tsuda, Kiyoshi Nakabayashi

IEICE Trans. Inf. Syst., 1995

Totally defect-tolerant arrays capable of quick broadcasting.

Nobuo Tsuda, Tsutomu Ishikawa, Yukihiro Nakamura

Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995

1993

Hierarchical redundancy for array-structure wsis.

Nobuo Tsuda

Syst. Comput. Jpn., 1993

Hierarchical redundancy for two-dimensional orthogonal arrays using defect-tolerant replacement circuits.

Nobuo Tsuda

Syst. Comput. Jpn., 1993

Defect- and fault-tolerant static ram module designs based on parity checking and automatic testing.

Nobuo Tsuda

Syst. Comput. Jpn., 1993

1989

A Compact Multiway Merge Sorter using Linear-Array Comparators.

Tetsuji Satoh, Hideaki Takeda, Nobuo Tsuda

Proceedings of the Foundations of Data Organization and Algorithms, 1989