Nobuhide Maeda

According to our database, Nobuhide Maeda authored at least 6 papers between 2007 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Review of wafer-level three-dimensional integration (3DI) using bumpless interconnects for tera-scale generation.

Takayuki Ohba, Young-Suk Kim, Yoriko Mizushima, Nobuhide Maeda, Koji Fujimoto, Shoichi Kodama

IEICE Electron. Express, 2015

2014

Impact of Thermomechanical Stresses on Ultra-thin Si Stacked Structure.

Yoriko Mizushima, Young-Suk Kim, Tomoji Nakamura, Shoichi Kodama, Nobuhide Maeda, Koji Fujimoto, Takayuki Ohba

Proceedings of the 2014 International 3D Systems Integration Conference, 2014

2013

Influence of wafer thinning process on backside damage in 3D integration.

Tadao Nakamura, Yoriko Mizushima, Hideki Kitada, Young-Suk Kim, Nobuhide Maeda, Shoichi Kodama, Ryuichi Sugie, Hiroshi Hashimoto, Akihito Kawai, Kazuhisa Arai, Akira Uedono, Takayuki Ohba

Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2011

Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects.

Tomoji Nakamura, Hideki Kitada, Yoriko Mizushima, Nobuhide Maeda, Koji Fujimoto, Takayuki Ohba

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

Development of ultra-thinning technology for logic and memory heterogeneous stack applications.

Nobuhide Maeda, Young-Suk Kim, Y. Hikosaka, T. Eshita, Hideki Kitada, K. Fujimoto, Yoriko Mizushima, K. Suzuki, Tadao Nakamura, Akihito Kawai, Kazuhisa Arai, Takayuki Ohba

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2007

Gate-Extension Overlap Control by Sb Tilt Implantation.

Kentaro Shibahara, Nobuhide Maeda

IEICE Trans. Electron., 2007