Nishath K. Verghese

According to our database1, Nishath K. Verghese authored at least 11 papers between 1993 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2006
Substrate Noise Coupling in SoC Design: Modeling, Avoidance, and Validation.
Proc. IEEE, 2006

2004
A predictive methodology for accurate substrate parasitic extraction.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A robust cell-level crosstalk delay change analysis.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003
A substrate noise analysis methodology for large-scale mixed-signal ICs.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

1998
Noise considerations for mixed-signal RF IC transceivers.
Wirel. Networks, 1998

Computer-aided design considerations for mixed-signal coupling in RF integrated circuits.
IEEE J. Solid State Circuits, 1998

1996
Verification techniques for substrate coupling and their application to mixed-signal IC design.
IEEE J. Solid State Circuits, 1996

1995
A Macromodel Compaction Scheme for the Fast Stimulation of Large Linear Mesh Circuits.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994
Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis.
IEEE J. Solid State Circuits, March, 1994

1993
A unified approach to simulating electrical and thermal substrate coupling interactions in ICs.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993


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