Nishant Patil
Orcid: 0000-0001-6620-0038
According to our database1,
Nishant Patil
authored at least 31 papers
between 2005 and 2024.
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Bibliography
2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
2023
TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023
2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
Proceedings of the IEEE Hot Chips 32 Symposium, 2020
2018
2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
2016
Google's Neural Machine Translation System: Bridging the Gap between Human and Machine Translation.
CoRR, 2016
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
2011
Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
2010
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.
Proceedings of the 47th Design Automation Conference, 2010
2009
Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the 27th International Conference on Computer Design, 2009
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions.
Proceedings of the 46th Design Automation Conference, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
Proceedings of the 2006 IEEE International Test Conference, 2006
2005