Nishant Nukala

According to our database1, Nishant Nukala authored at least 3 papers between 2012 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

2014
Spintronic Threshold Logic Array (STLA) - A compact, low leakage, non-volatile gate array architecture.
J. Parallel Distributed Comput., 2014

2012
Minimizing area and power of sequential CMOS circuits using threshold decomposition.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012


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