Nirmal Kumar Boran

According to our database, Nirmal Kumar Boran authored at least 9 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

MIST: Many-ISA Scheduling Technique for Heterogeneous-ISA Architectures.

Prakhar Diwan, Suryakant Toraskar, Varun Venkitaraman, Nirmal Kumar Boran, Chandramani Chaudhary, Virendra Singh

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

GNNDLD: Graph Neural Network with Directional Label Distribution.

Chandramani Chaudhary, Nirmal Kumar Boran, N. Sangeeth, Virendra Singh

Proceedings of the 16th International Conference on Agents and Artificial Intelligence, 2024

2023

Secure KNN Computation on Cloud.

Tikaram Sanyashi, Nirmal Kumar Boran, Virendra Singh

Proceedings of the Information Systems Security - 19th International Conference, 2023

2022

PASS-P: Performance and Security Sensitive Dynamic Cache Partitioning.

Nirmal Kumar Boran, Pranil Joshi, Virendra Singh

Proceedings of the 19th International Conference on Security and Cryptography, 2022

2021

Fine-Grained Scheduling in Heterogeneous-ISA Architectures.

Nirmal Kumar Boran, Shubhankit Rathore, Meet Udeshi, Virendra Singh

IEEE Comput. Archit. Lett., 2021

On Disabling Prefetcher to Amplify Cache Side Channels.

Nirmal Kumar Boran, Kenrick Pinto, Bernard Menezes

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

2020

Classification based scheduling in Heterogeneous ISA Architectures.

Nirmal Kumar Boran, Dinesh Kumar Yadav, Rishabh R. Iyer

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

2019

Performance Modelling and Dynamic Scheduling on Heterogeneous-ISA Multi-core Architectures.

Nirmal Kumar Boran, Dinesh Kumar Yadav, Rishabh R. Iyer

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

2016

Performance modelling of heterogeneous ISA multicore architectures.

Nirmal Kumar Boran, Rameshwar Prasad Meghwal, Kuldeep Sharma, Binod Kumar, Virendra Singh

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016