Niranjan Raj

Orcid: 0000-0002-9979-0596

According to our database1, Niranjan Raj authored at least 7 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Electronically Tunable Circuit Realization of Multimemelement Function Simulator and Its Application to Chaos Generation.
Int. J. Bifurc. Chaos, March, 2023

2022
A QFGMOS-Based g<sub>m</sub>-Boosted and Adaptively Biased Two-Stage Amplifier Offering Very High Gain and High Bandwidth.
J. Circuits Syst. Comput., 2022

2021
Frequency-Compensated Bulk-Driven TIA Suitable for Low-Voltage Low-Power Applications.
J. Circuits Syst. Comput., 2021

Mem-Elements Emulator Design With Experimental Validation and Its Application.
IEEE Access, 2021

2020
Flux-Controlled Memristor Emulator and Its Experimental Results.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Memristor Emulator Circuit Using Multiple-Output OTA and Its Experimental Results.
J. Circuits Syst. Comput., 2019

2018
Multiple output current controlled current conveyer transconductance amplifier (MO-CCCCDTA) using BiCMOS for analog signal processing.
Proceedings of the 2018 4th International Conference on Recent Advances in Information Technology (RAIT), 2018


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