Ningyuan Yin

Orcid: 0000-0001-6307-0004

According to our database¹, Ningyuan Yin authored at least 8 papers between 2013 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

On csauthors.net:

Bibliography

2024

Low-Power, High-Speed, and Area-Efficient Multiplier Based on the PTL Logic Style.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

2023

Parallel-Prefix Adder in Spin-Orbit Torque Magnetic RAM for High Bit-Width Non-Volatile Computation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

High-Reliability, Reconfigurable, and Fully Non-volatile Full-Adder Based on SOT-MTJ for Image Processing Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

A 6T-3M SOT-MRAM for in-memory computing with reconfigurable arithmetic operations.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2023

2022

An in-memory computing multiply-and-accumulate circuit based on ternary STT-MRAMs for convolutional neural networks.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2022

2021

An MTJ-Based Asynchronous System With Extremely Fine-Grained Voltage Scaling.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2017

The write deduplication mechanism based on a novel low-power data latched sense amplifier for a magnetic tunnel junction based non-volatile memory.

[BibT_eX]

[DOI]

Baofa Huang

Ningyuan Yin

Zhiyi Yu

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2013

A novel ESD device for Whole-Chip ESD protection network of TPMS mixed signal SoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Ningyuan Yin

Timeline

Legend:

Links

On csauthors.net:

Bibliography

Loading...