Nimananda Sharma

Orcid: 0000-0001-5026-1733

According to our database1, Nimananda Sharma authored at least 6 papers between 2020 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
Evaluation of Operating Range of a Machine Emulator for a Back-to-Back Power-Hardware-in-the-Loop Test Bench.
IEEE Trans. Ind. Electron., 2022

Zero-Sequence Current Reduction Technique for Electrical Machine Emulators With DC Coupling by Regulating the SVM Zero States.
IEEE Trans. Ind. Electron., 2022

A Novel Approach of Electric Powertrain Co-Simulation with High Fidelity Vehicle Model.
Proceedings of the IECON 2022, 2022

2020
Designing Thermally Uniform Heatsink with Rectangular Pins for High-Power Automotive SiC Inverters.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

Circulating Current Reduction in Common DC-Link Power-HIL for Drives using SVM with Zero-Sequence Compensation.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

Balancing Peak-torque and Drive-cycle Efficiency with Magnet Dimensioning of Permanent Magnet Synchronous Machines.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020


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