Nima Maghari
Orcid: 0000-0002-9168-5142
According to our database1,
Nima Maghari
authored at least 69 papers
between 2004 and 2024.
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Bibliography
2024
Recycled Counterfeit Chips Detection for AMS and Digital ICs Using Low-Area, Self-Contained, and Secure LDO Odometers.
J. Hardw. Syst. Secur., September, 2024
2023
IEEE Open J. Circuits Syst., 2023
Laser Fault Injection Vulnerability Assessment and Mitigation with Case Study on PG-TVD Logic Cells.
Proceedings of the IEEE International Test Conference, 2023
Mixed-Order Correlated Dual-loop Sturdy MASH CT ΔΣ Modulator with Distributed Signal Feed-in and VCO based Quantizer.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
IEEE J. Solid State Circuits, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
A Direct Sensor Readout Circuit Using VCO-Driven Chopping with 42dB SNR at 800µVpp Input.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A Metal-Via Resistance Based Physically Unclonable Function With Backend Incremental ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
IEEE Trans. Circuits Syst., 2020
2019
Proceedings of the IEEE International Test Conference, 2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Multi-Path Integrate and Fire Circuit for Determination of Tactile Sensations in a Prosthetic Limb.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Self-Reset Transconductance Integrating Leakage Latch (STILL) for Ultra-Low Power Sensor Interfacing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Metal-Via Resistance Based Physically Unclonable Function with 1.18% Native Instability.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
A Fully Synthesized 77-dB SFDR Reprogrammable SRMC Filter Using Digital Standard Cells.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security.
J. Hardw. Syst. Secur., 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Design and assessment of stimulation parameters for a novel peripheral nerve interface.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
A 4th-Order Continuous-Time Delta-Sigma Modulator Using 6-bit Double Noise-Shaped Quantizer.
IEEE J. Solid State Circuits, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Continuous-time delta-sigma modulator with maximally flat signal transfer function using minimum number of DACs.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
28.2 An 11.4mW 80.4dB-SNDR 15MHz-BW CT delta-sigma modulator using 6b double-noise-shaped quantizer.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A stochastic all-digital weak physically unclonable function for analog/mixed-signal applications.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017
A synthesizable time-based LDO using digital standard cells and analog pass transistor.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Ultra-thin biocompatible implantable chip for bidirectional communication with peripheral nerves.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
A 7.2 mW 75.3 dB SNDR 10 MHz BW CT Delta-Sigma Modulator Using Gm-C-Based Noise-Shaped Quantizer and Digital Integrator.
IEEE J. Solid State Circuits, 2016
A fully-synthesizable 0.6V digital LDO with dual-loop control using digital standard cells.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
A nano-ampere 2nd order temperature-compensated CMOS current reference using only single resistor for wide-temperature range applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Multi-stage delta-sigma modulator with a relaxed opamp gain using a back-end digital integrator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A 90nA quiescent current 1.5V-5V 50mA asynchronous folding LDO using dual loop control.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
A Continuous-Time ΔΣ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
An All-Digital Scalable and Reconfigurable Wide-Input Range Stochastic ADC Using Only Standard Cells.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Time-Interleaved Noise-Coupling Delta-Sigma Modulator Using Modified Noise-Shaped Integrating Quantizer.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Sturdy-MASH delta-sigma modulator with noise-shaped integrating quantizer and dual-DAC DWA.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A fully synthesized 0.4V 77dB SFDR reprogrammable SRMC filter using digital standard cells.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Noise-Shaped Residue-Discharging Delta-Sigma ADCs With Time-Modulated Pulse Feedback.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
2013
IEEE J. Solid State Circuits, June, 2013
2012
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the Symposium on VLSI Circuits, 2012
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
A Third-Order DT ΔΣ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer.
IEEE J. Solid State Circuits, 2011
A third-order DT ΔΣ modulator using noise-shaped bidirectional single-slope quantizer.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 30% beyond VDD signal swing 9-ENOB pipelined ADC using a 1.2V 30dB loop-gain opamp.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
2010
IEEE J. Solid State Circuits, 2010
A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Precise area-controlled return-to-zero current steering DAC with reduced sensitivity to clock jitter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain.
IEEE J. Solid State Circuits, 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Time-Shifted CDS Enhancement of Comparator-Based MDAC for Pipelined ADC Applications.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2005
IEEE Trans. Circuits Syst. II Express Briefs, 2005
A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004