Nils Hedenstierna

According to our database1, Nils Hedenstierna authored at least 8 papers between 1987 and 1993.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1993
Formal definitions of edge-based geometric design rules.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

The halo algorithm-an algorithm for hierarchical design of rule checking of VLSI circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Comments on 'A module generator for optimized CMOS buffers'.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1989
The Use of Inverse Layout Trees for Hierarchical Design Rule Checking.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
A corner-based hierarchical circuit extractor.
Integr., 1988

The use of inverse layout trees for hierarchical design verification.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1987
CMOS Circuit Speed and Buffer Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

New algorithms for increased efficiency in hierarchical design rule checking.
Integr., 1987


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