Nilmini Abeyratne

According to our database, Nilmini Abeyratne authored at least 6 papers between 2013 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Rethinking DRAM's Page Mode With STT-MRAM.

Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge

IEEE Trans. Computers, May, 2023

2019

SMART: STT-MRAM architecture for smart activation and sensing.

Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge

Proceedings of the International Symposium on Memory Systems, 2019

2016

Checkpointing Exascale Memory Systems with Existing Memory Technologies.

Nilmini Abeyratne, Hsing Min Chen, Byoungchan Oh, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge

Proceedings of the Second International Symposium on Memory Systems, 2016

Enhancing DRAM Self-Refresh for Idle Power Reduction.

Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

2014

Quality-of-Service for a High-Radix Switch.

Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Scaling towards kilo-core processors with asymmetric high-radix topologies.

Nilmini Abeyratne, Reetuparna Das, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge

Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013