Nilay Vaish

Orcid: 0000-0002-5419-2752

According to our database1, Nilay Vaish authored at least 6 papers between 2011 and 2024.

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Bibliography

2024
Characterizing a Memory Allocator at Warehouse Scale.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2020
The gem5 Simulator: Version 20.0+.
CoRR, 2020

2016
Optimization Models for Three On-Chip Network Problems.
ACM Trans. Archit. Code Optim., 2016

2013
Optimization and Mathematical Modeling in Computer Architecture
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01773-5, 2013

2011
The gem5 simulator.
SIGARCH Comput. Archit. News, 2011

Experiences in Co-designing a Packet Classification Algorithm and a Flexible Hardware Platform.
Proceedings of the 2011 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2011


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