Nikos Kanistras

Orcid: 0000-0002-7337-1107

According to our database1, Nikos Kanistras authored at least 14 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Angle of Arrival Estimation Using SRS in 5G NR Uplink Scenarios.
Proceedings of Work-in-Progress in Hardware and Software for Location Computation (WIPHAL 2024), 2024

2021
A Multirate Fully Parallel LDPC Encoder for the IEEE 802.11n/ac/ax QC-LDPC Codes Based on Reduced Complexity XOR Trees.
IEEE Trans. Very Large Scale Integr. Syst., 2021

2013
A semi-analytical bivariate Gaussian model of the approximation error impact on the Min-Sum LDPC decoding algorithm.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

2012
Error Floor Compensation for LDPC Codes Using Concatenated Schemes.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Propagation of LLR Saturation and Quantization Error in LDPC Min-Sum Iterative Decoding.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

An FPGA-based prototyping method for verification, characterization and optimization of LDPC error correction systems.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011
Impact of Approximation Error on the Decisions of LDPC Decoding.
J. Signal Process. Syst., 2011

An encoding scheme and encoder architecture for rate-compatible QC-LDPC codes.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Digital baseband challenges for a 60GHz gigabit link.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Multiple LDPC decoder of very low bit-error rate.
Proceedings of the 17th International Conference on Digital Signal Processing, 2011

A syndrome-based LDPC decoder with very low error floor.
Proceedings of the 17th International Conference on Digital Signal Processing, 2011

2008
Impact of roundoff error on the decisions of the Log Sum-Product algorithm for LDPC decoding.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Impact of roundoff errors in LDPC decoding.
Proceedings of the Third International Symposium on Wireless Pervasive Computing, 2008


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