Nikolaos Moschopoulos

According to our database, Nikolaos Moschopoulos authored at least 16 papers between 2001 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

On the Diminished-1 Modulo 2n+1 Addition and Subtraction.

Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos

J. Circuits Syst. Comput., 2020

2016

Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding.

Kostas Tsoumanis, Nicholas Axelos, Nikolaos Moschopoulos, Georgios Zervakis, Kiamal Z. Pekmestzi

IEEE Trans. Computers, 2016

2014

An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator.

Kostas Tsoumanis, Sotirios Xydis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Efficient modulo 2ⁿ+1 multiply and multiply-add units based on modified Booth encoding.

Constantinos Efstathiou, Nikos K. Moshopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi

Integr., 2014

2013

On the design of modulo 2ⁿ + 1 dot product and generalized multiply-add units.

Costas Efstathiou, Nikolaos Moschopoulos, Ioannis Voyiatzis, Kiamal Z. Pekmestzi

Comput. Electr. Eng., 2013

On the design of modulo 2ⁿ±1 residue generators.

Kostas Tsoumanis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Efficient modulo 2ⁿ+1 multiplication for the idea block cipher.

Kiamal Z. Pekmestzi, Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

2012

On the Design of Configurable Modulo 2n±1 Residue Generators.

Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis, Kiamal Z. Pekmestzi

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2010

A hardware peripheral for Java bytecodes translation acceleration.

Isidoros Sideris, Nikos K. Moshopoulos, Kiamal Z. Pekmestzi

Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), 2010

A New Low-Power Soft-Error Tolerant SRAM Cell.

Nicholas Axelos, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2008

A versatile timing unit for traffic shaping, policing and charging in packet-switched networks.

Lambros Sarakis, Nikos K. Moshopoulos, Dimitrios Loukatos, Kostas Marinis, Panagiotis Stathopoulos, Nikolas Mitrou

J. Syst. Archit., 2008

A BISR Architecture for Embedded Memories.

Kiamal Z. Pekmestzi, Nicholas Axelos, Isidoros Sideris, Nikos K. Moshopoulos

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2002

A Systolic, High Speed Architecture for an RSA Cryptosystem.

Kiamal Z. Pekmestzi, Nikos K. Moshopoulos

J. VLSI Signal Process., 2002

2001

A bit-interleaved systolic architecture for a high-speed RSA system.

Kiamal Z. Pekmestzi, Nikos K. Moshopoulos

Integr., 2001

A Novel Systolic Architecture for Efficient RSA Implementation.

Nikos K. Moshopoulos, Kiamal Z. Pekmestzi

Proceedings of the Public Key Cryptography, 2001

On the Hardware Implementation of the 3GPP Confidentiality and Integrity Algorithms.

Kostas Marinis, Nikos K. Moshopoulos, Fotis Karoubalis, Kiamal Z. Pekmestzi

Proceedings of the Information Security, 4th International Conference, 2001