Nikolaos Chrysos

Orcid: 0009-0002-8497-6985

According to our database1, Nikolaos Chrysos authored at least 43 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
RED-SEA Project: Towards a new-generation European interconnect.
Microprocess. Microsystems, 2024

Low-latency Communication in RISC-V Clusters.
Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2024

2023
The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack.
CoRR, 2023

2022
Optimized Page Fault Handling During RDMA.
IEEE Trans. Parallel Distributed Syst., 2022


2021
Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020
PART: Pinning Avoidance in RDMA Technologies.
Proceedings of the 14th IEEE/ACM International Symposium on Networks-on-Chip, 2020

TReM: A Task Revocation Mechanism for GPUs.
Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020

2019
Shall numerical astrophysics step into the era of Exascale computing?
CoRR, 2019


2018
Accurate Congestion Control for RDMA Transfers.
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

GPU Provisioning: The 80 - 20 80 - 20 Rule.
Proceedings of the Euro-Par 2018: Parallel Processing, 2018

2017
VineTalk: Simplifying software access and sharing of FPGAs in datacenters.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017


2016
Discharging the Network From Its Flow Control Headaches: Packet Drops and HOL Blocking.
IEEE/ACM Trans. Netw., 2016

Unbiased Quantized Congestion Notification for Scalable Server Fabrics.
IEEE Micro, 2016


2015
Large switches or blocking multi-stage networks? An evaluation of routing strategies for datacenter fabrics.
Comput. Networks, 2015

SCOC: High-radix switches made of bufferless clos networks.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

A Systematic Evaluation of Emerging Mesh-like CMP NoCs.
Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, 2015

2014
Tandem queue weighted fair smooth scheduling.
Des. Autom. Embed. Syst., 2014

High performance multipath routing for datacenters.
Proceedings of the IEEE 15th International Conference on High Performance Switching and Routing, 2014

All routes to efficient datacenter fabrics.
Proceedings of the 8th International Workshop on Interconnection Network Architecture, 2014

zFabric: How to virtualize lossless ethernet?
Proceedings of the 2014 IEEE International Conference on Cluster Computing, 2014

Integration and QoS of multicast traffic in a server-rack fabric with 640 100g ports.
Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, 2014

2013
How elastic is your virtualized datacenter fabric?
Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi-Chip, 2013

Arbitration of many thousand flows at 100G and beyond.
Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi-Chip, 2013

2012
Occupancy Sampling for Terabit CEE Switches.
Proceedings of the IEEE 20th Annual Symposium on High-Performance Interconnects, 2012

2011
Distributed WFQ scheduling converging to weighted max-min fairness.
Comput. Networks, 2011

2010
Towards low-cost high-performance all-optical interconnection networks.
Proceedings of the 11th IEEE International Conference on High Performance Switching and Routing, 2010

End-to-end congestion management for non-blocking multi-stage switching fabrics.
Proceedings of the 2010 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2010

Throughput of random arbitration for approximate matchings.
Proceedings of the 2010 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2010

2009
Practical High-Throughput Crossbar Scheduling.
IEEE Micro, 2009

2008
Fast arbiters for on-chip network switches.
Proceedings of the 26th International Conference on Computer Design, 2008

Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation.
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008

2007
Performance evaluation of the Data Vortex photonic switch.
IEEE J. Sel. Areas Commun., 2007

A buffered crossbar-based chip interconnection framework supporting quality of service.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Congestion management for non-blocking clos networks.
Proceedings of the 2007 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2007

2006
Request-grant scheduling for congestion elimination in multistage networks
PhD thesis, 2006

Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics.
Proceedings of the INFOCOM 2006. 25th IEEE International Conference on Computer Communications, 2006

2005
Scheduling in switches with small internal buffers.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

2004
Variable packet size buffered crossbar (CICQ) switches.
Proceedings of IEEE International Conference on Communications, 2004

Multiple priorities in a two-lane buffered crossbar.
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004


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