Niklas Lotze

According to our database1, Niklas Lotze authored at least 7 papers between 2007 and 2011.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2011
A 62mV 0.13μm CMOS standard-cell-based design technique using schmitt-trigger logic.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
A multiplierless structure for direct digital IF signal synthesis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Timing modeling for digital sub-threshold circuits.
Proceedings of the Design, Automation and Test in Europe, 2010

2008
Variability of flip-flop timing at sub-threshold voltages.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

On Design a High Speed Sigma Delta DAC Modulator for a Digital Communication Transceiver on Chip.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
Frame Based Memory Access Interpolation for A Digital Communication Modulator.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

A Study on self-timed asynchronous subthreshold logic.
Proceedings of the 25th International Conference on Computer Design, 2007


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