Nigel P. Topham
Orcid: 0000-0002-6310-0602Affiliations:
- University of Edinburgh, UK
According to our database1,
Nigel P. Topham
authored at least 65 papers
between 1985 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
2019
Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2019
Poise: Balancing Thread-Level Parallelism and Memory System Performance in GPUs Using Machine Learning.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
2018
High Speed Cycle-Approximate Simulation of Embedded Cache-Incoherent and Coherent Chip-Multiprocessors.
Int. J. Parallel Program., 2018
2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
2016
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016
2015
Efficient dual-ISA support in a retargetable, asynchronous Dynamic Binary Translator.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
Proceedings of the IEEE International Conference on Robotics and Automation, 2015
2014
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014
2013
Int. J. Parallel Program., 2013
Int. J. Parallel Program., 2013
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2012
Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
Generalized just-in-time trace compilation using a parallel task farm in a dynamic binary translator.
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011
Selecting the optimal system: automated design of application-specific systems-on-chip.
Proceedings of the 4th International Workshop on Network on Chip Architectures, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 8th Conference on Computing Frontiers, 2011
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011
2010
Exploring the unified design-space of custom-instruction selection and resource sharing.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010
2009
ACM Trans. Embed. Comput. Syst., 2009
Design-Space Exploration of Resource-Sharing Solutions for Custom Instruction Set Extensions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Introducing control-flow inclusion to support pipelining in custom instruction set extensions.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009
Proceedings of the High Performance Embedded Architectures and Compilers, 2009
2008
Proceedings of the IEEE Symposium on Application Specific Processors, 2008
2007
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems.
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007
Proceedings of the 21st International Conference on Advanced Information Networking and Applications (AINA 2007), 2007
2003
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003
2002
Proceedings of the IEEE International Conference on Acoustics, 2002
2000
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000
1999
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999
1998
Proceedings of the 1998 workshop on Computer architecture education, 1998
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998
1997
The Effect of Restricted Instruction Issue Width on an Access Decoupled Architecture.
Proceedings of the Parallel Computing: Fundamentals, 1997
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997
Proceedings of the 11th international conference on Supercomputing, 1997
Proceedings of the Euro-Par '97 Parallel Processing, 1997
Proceedings of the Euro-Par '97 Parallel Processing, 1997
1995
Proceedings of the Proceedings Supercomputing '95, San Diego, CA, USA, December 4-8, 1995, 1995
Proceedings of the High-Performance Computing and Networking, 1995
1994
Trace-Driven Simulation of Decoupled Architectures.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994
1993
The Performance of Parallel Loops on SCI-Based Memory Hierarchies.
Proceedings of the Parallel Computing: Trends and Applications, 1993
Performance of Weak Consistency Schemes on the DEC Alpha.
Proceedings of the Parallel Computing: Trends and Applications, 1993
Proceedings of the 7th international conference on Supercomputing, 1993
1992
Proceedings of the Parallel Processing: CONPAR 92, 1992
1990
1988
J. Supercomput., 1988
J. Supercomput., 1988
1985
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985