Nicolas Ventroux
According to our database1,
Nicolas Ventroux
authored at least 37 papers
between 2003 and 2023.
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Bibliography
2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2021
Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support.
Integr., 2021
2020
Standard-compliant Parallel SystemC simulation of Loosely-Timed Transaction Level Models.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
Fast Virtual Prototyping of Cyber-Physical Systems using SystemC and FMI: ADAS Use Case.
Proceedings of the 30th International Workshop on Rapid System Prototyping, 2019
Proceedings of the Rapid Simulation and Performance Evaluation: Methods and Tools, 2019
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019
2018
Data Flow Oriented Hardware Design of RNS-based Polynomial Multiplication for SHE Acceleration.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018
PNeuro: A scalable energy-efficient programmable hardware accelerator for neural networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
IACR Cryptol. ePrint Arch., 2017
2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
2013
J. Electron. Test., 2013
2012
J. Low Power Electron., 2012
SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation.
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2012
Relation between HCI-induced performance degradation and applications in a RISC processor.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012
2011
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Proceedings of the Facing the Multicore - Challenge II, 2011
Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
A systemc TLM framework for distributed simulation of complex systems with unpredictable communication.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
2010
Les architectures parallèles sur puce. Synthèse des architectures multitâches pour les systèmes embarqués.
Tech. Sci. Informatiques, 2010
SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Proceedings of the 22st International Symposium on Computer Architecture and High Performance Computing, 2010
A Power-Aware Online Scheduling Algorithm for Streaming Applications in Embedded MPSoC.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010
Proceedings of the NOCS 2010, 2010
Analysis of on-line self-testing policies for real-time embedded multiprocessors in DSM technologies.
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010
SCMP architecture: an asymmetric multiprocessor system-on-chip for dynamic applications.
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010
Proceedings of the 8th ACS/IEEE International Conference on Computer Systems and Applications, 2010
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010
2009
Proceedings of the 12th International IEEE Conference on Intelligent Transportation Systems, 2009
Approximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
2005
A Low Complex Scheduling Algorithm for Multi-processor System-on-Chip.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2005
2004
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems.
Proceedings of the Computer Systems: Architectures, 2004
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004
2003
Rapid prototyping for an optimized MPEG4 decoder implementation over a parallel heterogeneous architecture.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003
Rapid prototyping for an optimized MPEG-4 decoder implementation over a parallel heterogenous architecture.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003