Nicolas Butzen
Orcid: 0000-0002-4242-5563
According to our database1,
Nicolas Butzen
authored at least 20 papers
between 2015 and 2024.
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A Monolithic 12.7 W/mm<sup>2</sup>, 92% Peak-Efficiency Switched-Capacitor DC-DC Converter Using CSCR-First Topology.
IEEE J. Solid State Circuits, December, 2024
A Monolithic 5.7A/mm<sup>2</sup> 91% Peak Efficiency Scalable Multi-Stage Modular Switched Capacitor Voltage Regulator with Self-Timed Deadtime and Safe Startup for 3D-ICs.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
28.4 A Monolithic 12.7W/mm<sup>2</sup> Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A Monolithic 26A/mm<sup>2</sup>Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors.
IEEE J. Solid State Circuits, 2022
A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2020
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
Design of Single-Topology Continuously Scalable-Conversion-Ratio Switched- Capacitor DC-DC Converters.
IEEE J. Solid State Circuits, 2019
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
A Single-Topology Continuously-Scalable-Conversion-Ratio Fully Integrated Switched-Capacitor DC-DC Converter with 0-to-2.22V Output and 93% Peak-Efficiency.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A capacitive DC-DC converter for stacked loads with wide range DVS achieving 98.2% peak efficiency in 40nm CMOS.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
Design of Soft-Charging Switched-Capacitor DC-DC Converters Using Stage Outphasing and Multiphase Soft-Charging.
IEEE J. Solid State Circuits, 2017
MIMO Switched-Capacitor DC-DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution.
IEEE J. Solid State Circuits, 2017
10.1 A 1.1W/mm<sup>2</sup>-power-density 82%-efficiency fully integrated 3∶1 Switched-Capacitor DC-DC converter in baseline 28nm CMOS using Stage Outphasing and Multiphase Soft-Charging.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017
2016
Scalable Parasitic Charge Redistribution: Design of High-Efficiency Fully Integrated Switched-Capacitor DC-DC Converters.
IEEE J. Solid State Circuits, 2016
12.2 A 94.6%-efficiency fully integrated switched-capacitor DC-DC converter in baseline 40nm CMOS using scalable parasitic charge redistribution.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
MIMO Switched-Capacitor converter using only parasitic capacitance with Scalable Parasitic Charge Redistribution.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
When hardware is free, power is expensive! Is integrated power management the solution?
Proceedings of the ESSCIRC Conference 2015, 2015