Nicola Lupo

Orcid: 0000-0002-6504-4878

According to our database1, Nicola Lupo authored at least 9 papers between 2016 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
On the Linearity of BJT-Based Current-Mode DAC Drivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
A 1.5-ns Switching Time, 9-Bit Current-Mode DAC for High Speed Laser Diode Drivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Analysis of Parasitic Effects in Filamentary-Switching Memristive Memories Using an Approximated Verilog-A Memristor Model.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Study of DAC Architectures for Integrated Laser Driver Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A Voltage-Time Model for Memristive Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2018

An Approximated Verilog-A Model for Memristive Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A Cross-Coupled Redundant Sense Amplifier for Radiation Hardened SRAMs.
Proceedings of the New Generation of CAS, 2017

2016
Design of resistive non-volatile memories for rad-hard applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An integrated rad-hard test-vehicle for embedded emerging memories.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016


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