Nicola Ghittori

According to our database1, Nicola Ghittori authored at least 17 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2020
A 243-mW 1.25-56-Gb/s Continuous Range PAM-4 42.5-dB IL ADC/DAC-Based Transceiver in 7-nm FinFET.
IEEE J. Solid State Circuits, 2020

2019

2016
A 0.076 mm2 12 b 26.5 mW 600 MS/s 4-Way Interleaved Subranging SAR-ΔΣ ADC With On-Chip Buffer in 28 nm CMOS.
IEEE J. Solid State Circuits, 2016

27.8 A 0.076mm2 12b 26.5mW 600MS/s 4×-interleaved subranging SAR-ΔΣ ADC with on-chip buffer in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2010
Analysis and Measurement of Crosstalk Effects on Mixed-Signal CMOS ICs With Different Mounting Technologies.
IEEE Trans. Instrum. Meas., 2010

2008
A CMOS 5 nV/√Hz 74-dB-Gain-Range 82-dB-DR Multistandard Baseband Chain for Bluetooth, UMTS, and WLAN.
IEEE J. Solid State Circuits, 2008

2007
A 5nV/√Hz-IRN, 78dB-gain-range, 78dB-DR multi-standard baseband chain for Bluetooth, UMTS and WLAN.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
A 1.2- V 30.4-dBm OIP3 Reconfigurable Analog Baseband Channel for UMTS/WLAN Transmitters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

1.2-V Low-Power Multi-Mode DAC+Filter Blocks for Reconfigurable (WLAN/UMTS, WLAN/Bluetooth) Transmitters.
IEEE J. Solid State Circuits, 2006

Analog baseband channel for GSM/UMTS/WLAN/Bluetooth reconfigurable multistandard terminals.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Low-power 6-bit flash ADC for high-speed data converters architectures.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A low-distortion 1.2 V DAC+filter for transmitters in wireless applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Behavioral analysis and dimensioning of UMTS transmitters baseband blocks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Design of a low-power variable gain amplifier for reconfigurable wireless receivers.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

Analysis of the ideal SFDR limit for an N bit digital-to-analog converter.
Proceedings of the 12th IEEE International Conference on Electronics, 2005


  Loading...