Nhat Nguyen
Orcid: 0009-0001-4112-1138
According to our database1,
Nhat Nguyen
authored at least 27 papers
between 1999 and 2024.
Collaborative distances:
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Bibliography
2024
Proceedings of the ECAI 2024 - 27th European Conference on Artificial Intelligence, 19-24 October 2024, Santiago de Compostela, Spain, 2024
2022
Proceedings of the 23rd IEEE International Symposium on a World of Wireless, 2022
Approach portfolio selection for Vietnamese stock market based on nonlinear shrinkage method.
Proceedings of the 14th International Conference on Knowledge and Systems Engineering, 2022
2021
IEEE J. Solid State Circuits, 2021
10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture.
IEEE J. Solid State Circuits, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Voting shrinkage algorithm for Covariance Matrix Estimation and its application to portfolio selection.
Proceedings of the 2020 RIVF International Conference on Computing and Communication Technologies, 2020
6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
Proceedings of the Extended Abstracts of the 2020 CHI Conference on Human Factors in Computing Systems, 2020
2019
IEEE J. Solid State Circuits, 2019
2018
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2016
Mob. Networks Appl., 2016
2015
Proceedings of the Context-Aware Systems and Applications - 4th International Conference, 2015
2014
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.
IEEE J. Solid State Circuits, 2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
2013
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2011
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
IEEE J. Solid State Circuits, 2010
2009
IEEE J. Solid State Circuits, 2009
2007
A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
Computational Science and Engineering Online (CSE-Online): A Cyber-Infrastructure for Scientific Computing.
J. Chem. Inf. Model., 2006
2001
Efficient generalized cross-validation with applications to parametric image restoration and resolution enhancement.
IEEE Trans. Image Process., 2001
IEEE Trans. Image Process., 2001
2000
Proceedings of the 2000 International Conference on Image Processing, 2000
1999
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999