Nguyen Anh Vu Doan
Orcid: 0000-0002-8156-9025
According to our database1,
Nguyen Anh Vu Doan
authored at least 41 papers
between 2010 and 2024.
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Bibliography
2024
Energy-Efficient Spiking Neural Networks Using Approximate Neuron Circuits and 3D Stacking Memory.
Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024
2023
HeterGenMap: An Evolutionary Mapping Framework for Heterogeneous NoC-Based Neuromorphic Systems.
IEEE Access, 2023
Proceedings of the IEEE International Conference on Metrology for eXtended Reality, 2023
Reliability Estimation of ML for Image Perception: A Lightweight Nonlinear Transformation Approach Based on Full Reference Image Quality Metrics.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
Butterfly Effect Attack: Tiny and Seemingly Unrelated Perturbations for Object Detection.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
MigSpike: A Migration Based Algorithms and Architecture for Scalable Robust Neuromorphic Systems.
IEEE Trans. Emerg. Top. Comput., 2022
Int. J. Parallel Program., 2022
Region of interest based non-dominated sorting genetic algorithm-II: an invite and conquer approach.
Proceedings of the GECCO '22: Genetic and Evolutionary Computation Conference, Boston, Massachusetts, USA, July 9, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization.
Proceedings of the Architecture of Computing Systems - 35th International Conference, 2022
2021
Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures.
Microprocess. Microsystems, November, 2021
Protection switching schemes and mapping strategies for fail-operational hard real-time NoCs.
Microprocess. Microsystems, November, 2021
Model-Based Design Space Exploration for FPGA-based Image Processing Applications Employing Parameterizable Approximations.
Microprocess. Microsystems, November, 2021
ACM Trans. Embed. Comput. Syst., 2021
Region of Interest-Based Parameter Optimization for Approximate Image Processing on FPGAs.
Int. J. Netw. Comput., 2021
Classification Models in Genetic Algorithms for Commonality Optimization in Passive Crash Safety.
Proceedings of the Ninth International Symposium on Computing and Networking, 2021
Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
GenMap: A Genetic Algorithmic Approach for Optimizing Spatial Mapping of Coarse-Grained Reconfigurable Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Exploring Task and Channel Mapping Strategies in Fail-Operational and Hard Real-Time NoCs.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
On-Chip Democracy: A Study on the Use of Voting Systems for Computer Cache Memory Management.
Proceedings of the IEEE International Conference on Industrial Engineering and Engineering Management, 2020
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020
2019
Register Requirement Minimization of Fixed-Depth Pipelines for Streaming Data Applications.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCs.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCs.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019
Multi-Objective Optimization of Channel Mapping for Fail-Operational Hybrid TDM NoCs.
Proceedings of the Seventh International Symposium on Computing and Networking Workshops, 2019
The information processing factory: a paradigm for life cycle management of dependable systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
2018
Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures.
IEICE Trans. Inf. Syst., 2018
Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018
2017
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
Multi-objective Optimization for Application Mapping and Body Bias Control on a CGRA.
Proceedings of the 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2016
Multi-objective optimization and multi-criteria decision aid applied to the design of 3D-stacked integrated circuits.
4OR, 2016
2010
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010