Nezam Rohbani

Orcid: 0000-0002-1935-7830

According to our database1, Nezam Rohbani authored at least 25 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
An Efficient FPGA Architecture with Turn-Restricted Switch Boxes.
ACM Trans. Design Autom. Electr. Syst., May, 2024

2023
Power-Efficient and Aging-Aware Primary/Backup Technique for Heterogeneous Embedded Systems.
IEEE Trans. Sustain. Comput., 2023

OCRA: An Oblivious Congested Region Avoiding Routing Algorithm for 3D NoCs.
Proceedings of the 16th International Workshop on Network on Chip Architectures, 2023

CoolDRAM: An Energy-Efficient and Robust DRAM.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2022
RASHT: A Partially Reconfigurable Architecture for Efficient Implementation of CNNs.
IEEE Trans. Very Large Scale Integr. Syst., 2022

LETHOR: a thermal-aware proactive routing algorithm for 3D NoCs with less entrance to hot regions.
J. Supercomput., 2022

PVMC: Task Mapping and Scheduling Under Process Variation Heterogeneity in Mixed-Criticality Systems.
IEEE Trans. Emerg. Top. Comput., 2022

Peak-Power Aware Life-Time Reliability Improvement in Fault-Tolerant Mixed-Criticality Systems.
IEEE Open J. Circuits Syst., 2022

A Cluster-Based Energy-Aware Routing Algorithm for Wireless Sensor Networks.
Ad Hoc Sens. Wirel. Networks, 2022

PIPF-DRAM: processing in precharge-free DRAM.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
TAMER: an adaptive task allocation method for aging reduction in multi-core embedded real-time systems.
J. Supercomput., 2021

SRAM Gauge: SRAM Health Monitoring via Cells Race.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

PF-DRAM: A Precharge-Free DRAM Structure.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

The Impact of Faults on DNNs: A Case Study.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2020
Aging-Aware Context Switching in Multicore Processors Based on Workload Classification.
IEEE Comput. Archit. Lett., 2020

2019
Power Reduction and BTI Mitigation of Data-Cache Memory Based on the Storage Management of Narrow-Width Values.
IEEE Trans. Very Large Scale Integr. Syst., 2019

NVDL-Cache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2018
Compact modeling of dynamic trap density evolution for predicting circuit-performance aging.
Microelectron. Reliab., 2018

WiP: Floating XY-YX: An Efficient Thermal Management Routing Algorithm for 3D NoCs.
Proceedings of the 2018 IEEE 16th Intl Conf on Dependable, 2018

2017
Bias Temperature Instability Mitigation via Adaptive Cache Size Management.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Low Area Overhead NBTI/PBTI Sensor for SRAM Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2017

LAXY: A Location-Based Aging-Resilient Xy-Yx Routing Algorithm for Network on Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Modeling of dynamic trap density increase for aging simulation of any MOSFET circuits.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016
3D-DPS: An Efficient 3D-CAC for Reliable Data Transfer in 3D ICs.
Proceedings of the 12th European Dependable Computing Conference, 2016

2015
A fault-tolerant and energy-aware mechanism for cluster-based routing algorithm of WSNs.
Proceedings of the IFIP/IEEE International Symposium on Integrated Network Management, 2015


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