Netanel Shavit
Orcid: 0000-0003-2011-6329
According to our database1,
Netanel Shavit
authored at least 10 papers
between 2020 and 2024.
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Bibliography
2024
Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024
Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications.
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024
2023
Programmable All-in-One 4×8-/2×16-/1×32-Bits Dual Mode Logic Multiplier in 16 nm FinFET With Semi-Automatic Flow.
IEEE Access, 2023
2022
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic.
IEEE J. Solid State Circuits, 2022
2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Live Demonstration: A 0.8V, 1.54 pJ / 940 MHz Dual Mode Logic-Based 16x16-Bit Booth Multiplier in 16-nm FinFET.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic-Based Digital Circuits in 28nm FD-SOI Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020