Neeraj Kaul

According to our database, Neeraj Kaul authored at least 4 papers between 1989 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Design planning trends and challenges.

Neeraj Kaul

Proceedings of the 2010 International Symposium on Physical Design, 2010

1995

Performance Driven BIST Technique for Random Logic.

Charles Njinda, Neeraj Kaul

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1992

Multi-level qualitative reasoning applied to CMOS digital circuits.

Neeraj Kaul, Gautam Biswas, Bharat L. Bhuva

Artif. Intell. Eng., 1992

1989

An intelligent tutoring system for CMOS digital design.

Neeraj Kaul, C. J. Kee, Gautam Biswas

Proceedings of the Second International Conference on Industrial & Engineering Applications of Artificial Intelligence & Expert Systems, IEA/AIE 1989, June 6-9, 1989, Tullahoma, TN, USA, 1989