Naveen Kadayinti
Orcid: 0000-0003-0859-9380
According to our database1,
Naveen Kadayinti
authored at least 10 papers
between 2015 and 2023.
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Bibliography
2023
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2018
Measurements of the effect of jitter on the performance of clock retiming circuits for on-chip interconnects.
Microelectron. J., 2018
2017
Sense amplifier comparator with offset correction for decision feedback equalization based receivers.
Microelectron. J., 2017
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
Settling time of mesochronous clock re-timing circuits in the presence of timing jitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
CoRR, 2016
2015