Nathaniel Ross Pinckney

According to our database, Nathaniel Ross Pinckney authored at least 35 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks.

Nathaniel Ross Pinckney, Christopher Batten, Mingjie Liu, Haoxing Ren, Brucek Khailany

CoRR, 2024

PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs.

Christopher Batten, Nathaniel Ross Pinckney, Mingjie Liu, Haoxing Ren, Brucek Khailany

Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

2023

ChipNeMo: Domain-Adapted LLMs for Chip Design.

Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren

CoRR, 2023

VerilogEval: Evaluating Large Language Models for Verilog Code Generation.

Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren

CoRR, 2023

Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation.

Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation.

Rongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2021

Verifying High-Level Latency-Insensitive Designs with Formal Model Checking.

Steve Dai, Alicia Klinefelter, Haoxing Ren, Rangharajan Venkatesan, Ben Keller, Nathaniel Ross Pinckney, Brucek Khailany

CoRR, 2021

Simba: scaling deep-learning inference with chiplet-based architecture.

Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler

Commun. ACM, 2021

IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs.

Nathaniel Ross Pinckney, Rangharajan Venkatesan, Ben Keller, Brucek Khailany

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2020

A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm.

Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany

IEEE J. Solid State Circuits, 2020

2019

A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm.

Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.

Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

MAGNet: A Modular Accelerator Generator for Neural Networks.

Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany

Proceedings of the International Conference on Computer-Aided Design, 2019

A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology.

Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany

Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019

A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET.

Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Stephen G. Tell, Brian Zimmer, Tezaswi Raja, Kevin Zhou, William J. Dally, Brucek Khailany

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018

iRazor: Current-Based Error Detection and Correction Scheme for PVT Variation in 40-nm ARM Cortex-R4 Processor.

Yiqun Zhang, Mahmood Khayatzadeh, Kaiyuan Yang, Mehdi Saligane, Nathaniel Ross Pinckney, Massimo Alioto, David T. Blaauw, Dennis Sylvester

IEEE J. Solid State Circuits, 2018

A modular digital VLSI flow for high-productivity SoC design.

Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Impact of FinFET on Near-Threshold Voltage Scalability.

Nathaniel Ross Pinckney, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw, Lucian Shifren, Brian Cline, Saurabh Sinha

IEEE Des. Test, 2017

2016

8.8 iRazor: 3-transistor current-based error detection and correction in an ARM Cortex-R4 processor.

Yiqun Zhang, Mahmood Khayatzadeh, Kaiyuan Yang, Mehdi Saligane, Nathaniel Ross Pinckney, Massimo Alioto, David T. Blaauw, Dennis Sylvester

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Supply boosting for high-performance processors in flip-chip packages.

Nathaniel Ross Pinckney, Dennis Sylvester, David T. Blaauw

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability.

Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

A fully-integrated 40-phase flying-capacitance-dithered switched-capacitor voltage regulator with 6mV output ripple.

Suyoung Bang, Jae-sun Seo, Inhee Lee, Seokhyeon Jeong, Nathaniel Ross Pinckney, David T. Blaauw, Dennis Sylvester, Leland Chang

Proceedings of the Symposium on VLSI Circuits, 2015

Reconfigurable self-timed regenerators for wide-range voltage scaled interconnect.

Jingcheng Wang, Nathaniel Ross Pinckney, David T. Blaauw, Dennis Sylvester

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014

13.7 A reconfigurable sense amplifier with auto-zero calibration and pre-amplification in 28nm CMOS.

Bharan Giridhar, Nathaniel Ross Pinckney, Dennis Sylvester, David T. Blaauw

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013

Limits of Parallelism and Boosting in Dim Silicon.

Nathaniel Ross Pinckney, Ronald G. Dreslinski, Korey Sewell, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw

IEEE Micro, 2013

Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction.

Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David T. Blaauw, Dennis Sylvester

IEEE J. Solid State Circuits, 2013

A 467nW CMOS visual motion sensor with temporal averaging and pixel aggregation.

Gyouho Kim, Mahmood Barangi, Zhiyoong Foo, Nathaniel Ross Pinckney, Suyoung Bang, David T. Blaauw, Dennis Sylvester

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

Swizzle-Switch Networks for Many-Core Systems.

Korey Sewell, Ronald G. Dreslinski, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das, Thomas F. Wenisch, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge

IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Bubble Razor: An architecture-independent approach to timing-error detection and correction.

Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David T. Blaauw, Dennis Sylvester

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Swizzle Switch: A self-arbitrating high-radix crossbar for NoC systems.

Ronald G. Dreslinski, Korey Sewell, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das, Thomas F. Wenisch, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge

Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012

Assessing the performance limits of parallelized near-threshold computing.

Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems.

Ronald G. Dreslinski, Thomas Manville, Korey Sewell, Reetuparna Das, Nathaniel Ross Pinckney, Sudhir Satpathy, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2008

A MIPS R2000 implementation.

Nathaniel Ross Pinckney, Thomas Barr, Michael Dayringer, Matthew McKnett, Nan Jiang, Carl Nygaard, David Money Harris, Joel Stanley, Braden Phillips

Proceedings of the 45th Design Automation Conference, 2008

Parallel high-radix Montgomery multipliers.

Philip Amberg, Nathaniel Ross Pinckney, David Money Harris

Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

2007

Parallelized radix-4 scalable montgomery multipliers.

Nathaniel Ross Pinckney, David Money Harris

Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007