Natarajan Mahadeva Iyer

According to our database1, Natarajan Mahadeva Iyer authored at least 7 papers between 2003 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2019
Physical Model for ESD Human Body Model to Transmission Line Pulse.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Tunable Holding-Voltage High Voltage ESD Devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2015
Printed-circuit board (PCB) charge induced product yield-loss during the final test.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Methodology to achieve planar technology-like ESD performance in FINFET process.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2006
Introduction to special section on selected papers from EOS/ESD Symposium 2004.
Microelectron. Reliab., 2006

2005
A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS.
IEEE J. Solid State Circuits, 2005

2003
ESD Reliability Challenges for RF/Mixed Signal Design & Processing.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003


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