Natalia Butorina

According to our database, Natalia Butorina authored at least 7 papers between 2011 and 2018.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2018

Fault-Tolerant Synchronous FSM Network Design for Path Delay Faults.

Sergey Ostanin, Valentina Andreeva, Natalia Butorina, D. Tretyakov

Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Evaluation of Code-Word Subsets to Ensure the Self-Testing Property of a Checker.

Natalia Butorina, Yulia Burkatovskaya, Elena Pakhomova

Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017

Logic circuit design with gates, LUTs and MUXs oriented to mask faults.

Anzhela Yu. Matrosova, Sergey Ostanin, D. Tretyakov, Natalia Butorina

Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2016

A fault-tolerant sequential circuit design for soft errors based on fault-secure circuit.

Sergey Ostanin, Anzhela Yu. Matrosova, Natalia Butorina, V. Lavrov

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015

Simplification of the scheme of the self-tested detector (m, w)-code.

Natalia Butorina

Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

2014

Self-testing checker design for incomplete m-out-of-n codes.

Natalia Butorina

Proceedings of the 2014 East-West Design & Test Symposium, 2014

2011

Implementation by the special formula of an arbitrary subset of code words of (m, n)-code for designing a self-testing checker.

Natalia Butorina, Sergey Ostanin

Proceedings of the 9th East-West Design & Test Symposium, 2011