Nasser Erfani Majd

According to our database, Nasser Erfani Majd authored at least 7 papers between 2010 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Parallel Input Series Output Ultra-High Step up DC/DC Converter With Three Degrees of Freedom.

Rezvan Fani, Reza Montazerolghaem, Ehsan Adib, Nasser Erfani Majd

IEEE Trans. Ind. Electron., August, 2024

2022

Complexity-Reduced Parallel Time-Interleaved Delta-Sigma Modulator for Transmitter Applications.

Nasser Erfani Majd, Rezvan Fani

J. Circuits Syst. Comput., 2022

2020

Efficiency Improvement of Delta Sigma Modulator-Based Transmitter Using Complex Delta Sigma Modulator and Noise Reduction Loop.

Nasser Erfani Majd, Amin Aeenmehr

J. Circuits Syst. Comput., 2020

2017

Coding Efficiency and Bandwidth Enhancement in Polar Delta-Sigma Modulator Transmitter Using Quantization Noise Reduction and Parallel Processing Techniques.

Nasser Erfani Majd, Hassan Ghafoori Fard, Abbas Mohammadi

J. Circuits Syst. Comput., 2017

2011

An ultra low-power digitally controlled oscillator using novel Schmitt-trigger based hysteresis delay cells.

Nasser Erfani Majd, Mojtaba Lotfizad, M. B. Ghaznavi-Ghoushchi, Arash Abadian

IEICE Electron. Express, 2011

An ultra low power and low complexity all digital PLL with a high resolution digitally controlled oscillator.

Arash Abadian, Mojtaba Lotfizad, M. B. Ghaznavi-Ghoushchi, Nasser Erfani Majd

IEICE Electron. Express, 2011

2010

A new low-power and low-complexity all digital PLL (ADPLL) in 180nm and 32nm.

Arash Abadian, Mojtaba Lotfizad, Nasser Erfani Majd, Mohammad Bagher Ghaznavi Ghoushchi, H. Mirzaie

Proceedings of the 17th IEEE International Conference on Electronics, 2010