Nasser A. Kurd
According to our database1,
Nasser A. Kurd
authored at least 23 papers
between 2001 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOS.
IEEE J. Solid State Circuits, 2022
Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control.
IEEE J. Solid State Circuits, 2022
A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
29.3 80ns Fast-Lock 0.4-to-6.5GHz Clock Generator with Self- Referenced Asynchronous Adaptive Droop Mitigation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2016
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process.
IEEE J. Solid State Circuits, 2016
19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
Proceedings of the Symposium on VLSI Circuits, 2015
Low power analog circuit techniques in the 5<sup>th</sup> generation intel core<sup>TM</sup> microprocessor (broadwell).
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
A system-verilog behavioral model for PLLs for pre-silicon validation and top-down design methodology.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2012
Intel® Core™ i5/i7 QuickPath Interconnect receiver clocking circuits and training algorithm.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
IEEE J. Solid State Circuits, 2009
2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
2007
Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
2001
IEEE J. Solid State Circuits, 2001