Narges Shahidi

According to our database1, Narges Shahidi authored at least 13 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
SCOOP: A Scalable Object-Oriented Serverless Platform.
Proceedings of the 16th IEEE International Conference on Cloud Computing, 2023

2021
Cross-Platform Performance Evaluation of Stateful Serverless Workflows.
Proceedings of the IEEE International Symposium on Workload Characterization, 2021

2018
SimpleSSD: Modeling Solid State Drives for Holistic System Simulation.
IEEE Comput. Archit. Lett., 2018

CachedGC: Cache-Assisted Garbage Collection in Modern Solid State Drives.
Proceedings of the 26th IEEE International Symposium on Modeling, 2018

2017
Hardware-Software Co-design to Mitigate DRAM Refresh Overheads: A Case for Refresh-Aware Process Scheduling.
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016
Exploring the potentials of parallel garbage collection in SSDs for enterprise storage systems.
Proceedings of the International Conference for High Performance Computing, 2016

Storage consolidation: Not always a panacea, but can we ease the pain?
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

2015
EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors.
ACM Trans. Archit. Code Optim., 2015

Storage Consolidation on SSDs: Not Always a Panacea, but Can We Ease the Pain?
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2012
Heterogeneous Interconnect for Low-Power Snoop-Based Chip Multiprocessors.
J. Low Power Electron., 2012

2010
Using Partial Tag Comparison in Low-Power Snoop-Based Chip Multiprocessors.
Proceedings of the Computer Architecture, 2010

Helia: Heterogeneous Interconnect for Low Resolution Cache Access in snoop-based chip multiprocessors.
Proceedings of the 28th International Conference on Computer Design, 2010


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